| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NVIDIA Tegra20 S/PDIF Controller |
| 8 | |
| 9 | description: | |
| 10 | The S/PDIF controller supports both input and output in serial audio |
| 11 | digital interface format. The input controller can digitally recover |
| 12 | a clock from the received stream. The S/PDIF controller is also used |
| 13 | to generate the embedded audio for HDMI output channel. |
| 14 | |
| 15 | maintainers: |
| 16 | - Thierry Reding <treding@nvidia.com> |
| 17 | - Jon Hunter <jonathanh@nvidia.com> |
| 18 | |
| 19 | allOf: |
| 20 | - $ref: dai-common.yaml# |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | const: nvidia,tegra20-spdif |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | resets: |
| 30 | maxItems: 1 |
| 31 | |
| 32 | interrupts: |
| 33 | maxItems: 1 |
| 34 | |
| 35 | clocks: |
| 36 | minItems: 2 |
| 37 | |
| 38 | clock-names: |
| 39 | items: |
| 40 | - const: out |
| 41 | - const: in |
| 42 | |
| 43 | dmas: |
| 44 | minItems: 2 |
| 45 | |
| 46 | dma-names: |
| 47 | items: |
| 48 | - const: rx |
| 49 | - const: tx |
| 50 | |
| 51 | "#sound-dai-cells": |
| 52 | const: 0 |
| 53 | |
| 54 | nvidia,fixed-parent-rate: |
| 55 | description: | |
| 56 | Specifies whether board prefers parent clock to stay at a fixed rate. |
| 57 | This allows multiple Tegra20 audio components work simultaneously by |
| 58 | limiting number of supportable audio rates. |
| 59 | type: boolean |
| 60 | |
| 61 | required: |
| 62 | - compatible |
| 63 | - reg |
| 64 | - resets |
| 65 | - interrupts |
| 66 | - clocks |
| 67 | - clock-names |
| 68 | - dmas |
| 69 | - dma-names |
| 70 | - "#sound-dai-cells" |
| 71 | |
| 72 | unevaluatedProperties: false |
| 73 | |
| 74 | examples: |
| 75 | - | |
| 76 | spdif@70002400 { |
| 77 | compatible = "nvidia,tegra20-spdif"; |
| 78 | reg = <0x70002400 0x200>; |
| 79 | interrupts = <77>; |
| 80 | clocks = <&clk 99>, <&clk 98>; |
| 81 | clock-names = "out", "in"; |
| 82 | resets = <&rst 10>; |
| 83 | dmas = <&apbdma 3>, <&apbdma 3>; |
| 84 | dma-names = "rx", "tx"; |
| 85 | #sound-dai-cells = <0>; |
| 86 | }; |
| 87 | |
| 88 | ... |