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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
8
9maintainers:
10 - Fugang Duan <fugang.duan@nxp.com>
11
12allOf:
13 - $ref: rs485.yaml#
14 - $ref: serial.yaml#
15
16properties:
17 compatible:
18 oneOf:
19 - enum:
20 - fsl,vf610-lpuart
21 - fsl,ls1021a-lpuart
22 - fsl,ls1028a-lpuart
23 - fsl,imx7ulp-lpuart
24 - fsl,imx8qxp-lpuart
25 - fsl,imxrt1050-lpuart
26 - items:
27 - enum:
28 - fsl,imx8ulp-lpuart
29 - const: fsl,imx7ulp-lpuart
30 - items:
31 - enum:
32 - fsl,imx93-lpuart
Tom Rini6bb92fc2024-05-20 09:54:58 -060033 - fsl,imx95-lpuart
Tom Rini53633a82024-02-29 12:33:36 -050034 - const: fsl,imx8ulp-lpuart
35 - const: fsl,imx7ulp-lpuart
36 - items:
37 - enum:
38 - fsl,imx8qm-lpuart
39 - fsl,imx8dxl-lpuart
40 - const: fsl,imx8qxp-lpuart
41 - items:
42 - const: fsl,imxrt1050-lpuart
43 - const: fsl,imxrt1170-lpuart
44
45 reg:
46 maxItems: 1
47
48 interrupts:
49 maxItems: 1
50
51 clocks:
52 items:
53 - description: ipg clock
54 - description: baud clock
55 minItems: 1
56
57 clock-names:
58 items:
59 - const: ipg
60 - const: baud
61 minItems: 1
62
63 dmas:
64 items:
65 - description: DMA controller phandle and request line for RX
66 - description: DMA controller phandle and request line for TX
67
68 dma-names:
69 items:
70 - const: rx
71 - const: tx
72
73 power-domains:
74 maxItems: 1
75
76required:
77 - compatible
78 - reg
79 - interrupts
80 - clocks
81 - clock-names
82
83unevaluatedProperties: false
84
85examples:
86 - |
87 #include <dt-bindings/clock/vf610-clock.h>
88
89 serial@40027000 {
90 compatible = "fsl,vf610-lpuart";
91 reg = <0x40027000 0x1000>;
92 interrupts = <0 61 0x00>;
93 clocks = <&clks VF610_CLK_UART0>;
94 clock-names = "ipg";
95 dmas = <&edma0 0 2>, <&edma0 0 3>;
96 dma-names = "rx","tx";
97 };