Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | # Copyright 2019 BayLibre, SAS |
| 3 | %YAML 1.2 |
| 4 | --- |
| 5 | $id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml# |
| 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
| 8 | title: Amlogic Meson SoC UART Serial Interface |
| 9 | |
| 10 | maintainers: |
| 11 | - Neil Armstrong <neil.armstrong@linaro.org> |
| 12 | |
| 13 | description: | |
| 14 | The Amlogic Meson SoC UART Serial Interface is present on a large range |
| 15 | of SoCs, and can be present either in the "Always-On" power domain or the |
| 16 | "Everything-Else" power domain. |
| 17 | |
| 18 | The particularity of the "Always-On" Serial Interface is that the hardware |
| 19 | is active since power-on and does not need any clock gating and is usable |
| 20 | as very early serial console. |
| 21 | |
| 22 | allOf: |
| 23 | - $ref: serial.yaml# |
| 24 | |
| 25 | properties: |
| 26 | compatible: |
| 27 | oneOf: |
| 28 | - description: Always-on power domain UART controller |
| 29 | items: |
| 30 | - enum: |
| 31 | - amlogic,meson6-uart |
| 32 | - amlogic,meson8-uart |
| 33 | - amlogic,meson8b-uart |
| 34 | - amlogic,meson-gx-uart |
| 35 | - amlogic,meson-s4-uart |
| 36 | - amlogic,meson-a1-uart |
| 37 | - const: amlogic,meson-ao-uart |
| 38 | - description: Always-on power domain UART controller on G12A SoCs |
| 39 | items: |
| 40 | - const: amlogic,meson-g12a-uart |
| 41 | - const: amlogic,meson-gx-uart |
| 42 | - const: amlogic,meson-ao-uart |
| 43 | - description: Everything-Else power domain UART controller |
| 44 | enum: |
| 45 | - amlogic,meson6-uart |
| 46 | - amlogic,meson8-uart |
| 47 | - amlogic,meson8b-uart |
| 48 | - amlogic,meson-gx-uart |
| 49 | - amlogic,meson-s4-uart |
| 50 | - amlogic,meson-a1-uart |
| 51 | - description: Everything-Else power domain UART controller on G12A SoCs |
| 52 | items: |
| 53 | - const: amlogic,meson-g12a-uart |
| 54 | - const: amlogic,meson-gx-uart |
| 55 | - description: UART controller on S4 compatible SoCs |
| 56 | items: |
| 57 | - const: amlogic,t7-uart |
| 58 | - const: amlogic,meson-s4-uart |
| 59 | |
| 60 | reg: |
| 61 | maxItems: 1 |
| 62 | |
| 63 | interrupts: |
| 64 | maxItems: 1 |
| 65 | |
| 66 | clocks: |
| 67 | items: |
| 68 | - description: external xtal clock identifier |
| 69 | - description: the bus core clock, either the clk81 clock or the gate clock |
| 70 | - description: the source of the baudrate generator, can be either the xtal or the pclk |
| 71 | |
| 72 | clock-names: |
| 73 | items: |
| 74 | - const: xtal |
| 75 | - const: pclk |
| 76 | - const: baud |
| 77 | |
| 78 | fifo-size: |
| 79 | description: The fifo size supported by the UART channel. |
| 80 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 81 | enum: [64, 128] |
| 82 | |
| 83 | required: |
| 84 | - compatible |
| 85 | - reg |
| 86 | - interrupts |
| 87 | - clocks |
| 88 | - clock-names |
| 89 | |
| 90 | unevaluatedProperties: false |
| 91 | |
| 92 | examples: |
| 93 | - | |
| 94 | serial@84c0 { |
| 95 | compatible = "amlogic,meson-gx-uart"; |
| 96 | reg = <0x84c0 0x14>; |
| 97 | interrupts = <26>; |
| 98 | clocks = <&xtal>, <&pclk>, <&xtal>; |
| 99 | clock-names = "xtal", "pclk", "baud"; |
| 100 | }; |