| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Nuvoton NPCM Reset controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Tomer Maimon <tmaimon77@gmail.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | enum: |
| 15 | - nuvoton,npcm750-reset # Poleg NPCM7XX SoC |
| 16 | - nuvoton,npcm845-reset # Arbel NPCM8XX SoC |
| 17 | |
| 18 | reg: |
| 19 | maxItems: 1 |
| 20 | |
| 21 | '#reset-cells': |
| 22 | const: 2 |
| 23 | |
| 24 | nuvoton,sysgcr: |
| 25 | $ref: /schemas/types.yaml#/definitions/phandle |
| 26 | description: a phandle to access GCR registers. |
| 27 | |
| 28 | nuvoton,sw-reset-number: |
| 29 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 30 | minimum: 1 |
| 31 | maximum: 4 |
| 32 | description: | |
| 33 | Contains the software reset number to restart the SoC. |
| 34 | If not specified, software reset is disabled. |
| 35 | |
| 36 | required: |
| 37 | - compatible |
| 38 | - reg |
| 39 | - '#reset-cells' |
| 40 | - nuvoton,sysgcr |
| 41 | |
| 42 | additionalProperties: false |
| 43 | |
| 44 | examples: |
| 45 | - | |
| 46 | #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h> |
| 47 | rstc: rstc@f0801000 { |
| 48 | compatible = "nuvoton,npcm750-reset"; |
| 49 | reg = <0xf0801000 0x70>; |
| 50 | #reset-cells = <2>; |
| 51 | nuvoton,sysgcr = <&gcr>; |
| 52 | nuvoton,sw-reset-number = <2>; |
| 53 | }; |
| 54 | |
| 55 | // Specifying reset lines connected to IP NPCM7XX modules |
| 56 | spi0: spi { |
| 57 | resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>; |
| 58 | }; |