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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / remoteproc / qcom,sc8280xp-pas.yaml
blob: 96d53baf6e0070896697a76b883ee903d6fc27f6 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SC8280XP Peripheral Authentication Service
8
9maintainers:
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11
12description:
13 Qualcomm SC8280XP SoC Peripheral Authentication Service loads and boots
14 firmware on the Qualcomm DSP Hexagon cores.
15
16properties:
17 compatible:
18 enum:
19 - qcom,sc8280xp-adsp-pas
20 - qcom,sc8280xp-nsp0-pas
21 - qcom,sc8280xp-nsp1-pas
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: XO clock
29
30 clock-names:
31 items:
32 - const: xo
33
34 qcom,qmp:
35 $ref: /schemas/types.yaml#/definitions/phandle
36 description: Reference to the AOSS side-channel message RAM.
37
38 smd-edge: false
39
40 memory-region:
41 maxItems: 1
42 description: Reference to the reserved-memory for the Hexagon core
43
44 firmware-name:
45 $ref: /schemas/types.yaml#/definitions/string
46 description: Firmware name for the Hexagon core
47
48required:
49 - compatible
50 - reg
51 - memory-region
52
53allOf:
54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
55 - if:
56 properties:
57 compatible:
58 enum:
59 - qcom,sc8280xp-nsp0-pas
60 - qcom,sc8280xp-nsp1-pas
61 then:
62 properties:
63 interrupts:
64 maxItems: 5
65 interrupt-names:
66 maxItems: 5
67 else:
68 properties:
69 interrupts:
70 minItems: 6
71 interrupt-names:
72 minItems: 6
73
74 - if:
75 properties:
76 compatible:
77 enum:
78 - qcom,sc8280xp-adsp-pas
79 then:
80 properties:
81 power-domains:
82 items:
83 - description: LCX power domain
84 - description: LMX power domain
85 power-domain-names:
86 items:
87 - const: lcx
88 - const: lmx
89 else:
90 properties:
91 power-domains:
92 items:
93 - description: NSP power domain
94 power-domain-names:
95 items:
96 - const: nsp
97
98unevaluatedProperties: false
99
100examples:
101 - |
102 #include <dt-bindings/clock/qcom,rpmh.h>
103 #include <dt-bindings/interrupt-controller/arm-gic.h>
104 #include <dt-bindings/interrupt-controller/irq.h>
105 #include <dt-bindings/mailbox/qcom-ipcc.h>
106 #include <dt-bindings/power/qcom-rpmpd.h>
107
108 remoteproc@3000000 {
109 compatible = "qcom,sc8280xp-adsp-pas";
110 reg = <0x03000000 0x100>;
111
112 clocks = <&rpmhcc RPMH_CXO_CLK>;
113 clock-names = "xo";
114
115 firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
116
117 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
118 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
119 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
120 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
121 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
122 <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
123 interrupt-names = "wdog", "fatal", "ready",
124 "handover", "stop-ack", "shutdown-ack";
125
126 memory-region = <&pil_adsp_mem>;
127
128 power-domains = <&rpmhpd SC8280XP_LCX>,
129 <&rpmhpd SC8280XP_LMX>;
130 power-domain-names = "lcx", "lmx";
131
132 qcom,qmp = <&aoss_qmp>;
133 qcom,smem-states = <&smp2p_adsp_out 0>;
134 qcom,smem-state-names = "stop";
135
136 glink-edge {
137 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
138 IPCC_MPROC_SIGNAL_GLINK_QMP
139 IRQ_TYPE_EDGE_RISING>;
140 mboxes = <&ipcc IPCC_CLIENT_LPASS
141 IPCC_MPROC_SIGNAL_GLINK_QMP>;
142
143 label = "lpass";
144 qcom,remote-pid = <2>;
145
146 /* ... */
147 };
148 };