| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner SoCs PPU power domain controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Samuel Holland <samuel@sholland.org> |
| 11 | |
| 12 | description: |
| 13 | D1 and related SoCs contain a power domain controller for the CPUs, GPU, and |
| 14 | video-related hardware. |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | enum: |
| 19 | - allwinner,sun20i-d1-ppu |
| 20 | |
| 21 | reg: |
| 22 | maxItems: 1 |
| 23 | |
| 24 | clocks: |
| 25 | description: Bus Clock |
| 26 | maxItems: 1 |
| 27 | |
| 28 | resets: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | '#power-domain-cells': |
| 32 | const: 1 |
| 33 | |
| 34 | required: |
| 35 | - compatible |
| 36 | - reg |
| 37 | - clocks |
| 38 | - resets |
| 39 | - '#power-domain-cells' |
| 40 | |
| 41 | additionalProperties: false |
| 42 | |
| 43 | examples: |
| 44 | - | |
| 45 | #include <dt-bindings/clock/sun20i-d1-r-ccu.h> |
| 46 | #include <dt-bindings/reset/sun20i-d1-r-ccu.h> |
| 47 | |
| 48 | ppu: power-controller@7001000 { |
| 49 | compatible = "allwinner,sun20i-d1-ppu"; |
| 50 | reg = <0x7001000 0x1000>; |
| 51 | clocks = <&r_ccu CLK_BUS_R_PPU>; |
| 52 | resets = <&r_ccu RST_BUS_R_PPU>; |
| 53 | #power-domain-cells = <1>; |
| 54 | }; |