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Tom Rini53633a82024-02-29 12:33:36 -05001Bitmain BM1880 Pin Controller
2
3This binding describes the pin controller found in the BM1880 SoC.
4
5Required Properties:
6
7- compatible: Should be "bitmain,bm1880-pinctrl"
8- reg: Offset and length of pinctrl space in SCTRL.
9
10Please refer to pinctrl-bindings.txt in this directory for details of the
11common pinctrl bindings used by client devices, including the meaning of the
12phrase "pin configuration node".
13
14The pin configuration nodes act as a container for an arbitrary number of
15subnodes. Each of these subnodes represents some desired configuration for a
16pin, a group, or a list of pins or groups. This configuration for BM1880 SoC
17includes pinmux and various pin configuration parameters, such as pull-up,
18slew rate etc...
19
20Each configuration node can consist of multiple nodes describing the pinmux
21options. The name of each subnode is not important; all subnodes should be
22enumerated and processed purely based on their content.
23
24The following generic properties as defined in pinctrl-bindings.txt are valid
25to specify in a pinmux subnode:
26
27Required Properties:
28
29- pins: An array of strings, each string containing the name of a pin.
30 Valid values for pins are:
31
32 MIO0 - MIO111
33
34- groups: An array of strings, each string containing the name of a pin
35 group. Valid values for groups are:
36
37 nand_grp, spi_grp, emmc_grp, sdio_grp, eth0_grp, pwm0_grp,
38 pwm1_grp, pwm2_grp, pwm3_grp, pwm4_grp, pwm5_grp, pwm6_grp,
39 pwm7_grp, pwm8_grp, pwm9_grp, pwm10_grp, pwm11_grp, pwm12_grp,
40 pwm13_grp, pwm14_grp, pwm15_grp, pwm16_grp, pwm17_grp,
41 pwm18_grp, pwm19_grp, pwm20_grp, pwm21_grp, pwm22_grp,
42 pwm23_grp, pwm24_grp, pwm25_grp, pwm26_grp, pwm27_grp,
43 pwm28_grp, pwm29_grp, pwm30_grp, pwm31_grp, pwm32_grp,
44 pwm33_grp, pwm34_grp, pwm35_grp, pwm36_grp, i2c0_grp,
45 i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp, uart0_grp, uart1_grp,
46 uart2_grp, uart3_grp, uart4_grp, uart5_grp, uart6_grp,
47 uart7_grp, uart8_grp, uart9_grp, uart10_grp, uart11_grp,
48 uart12_grp, uart13_grp, uart14_grp, uart15_grp, gpio0_grp,
49 gpio1_grp, gpio2_grp, gpio3_grp, gpio4_grp, gpio5_grp,
50 gpio6_grp, gpio7_grp, gpio8_grp, gpio9_grp, gpio10_grp,
51 gpio11_grp, gpio12_grp, gpio13_grp, gpio14_grp, gpio15_grp,
52 gpio16_grp, gpio17_grp, gpio18_grp, gpio19_grp, gpio20_grp,
53 gpio21_grp, gpio22_grp, gpio23_grp, gpio24_grp, gpio25_grp,
54 gpio26_grp, gpio27_grp, gpio28_grp, gpio29_grp, gpio30_grp,
55 gpio31_grp, gpio32_grp, gpio33_grp, gpio34_grp, gpio35_grp,
56 gpio36_grp, gpio37_grp, gpio38_grp, gpio39_grp, gpio40_grp,
57 gpio41_grp, gpio42_grp, gpio43_grp, gpio44_grp, gpio45_grp,
58 gpio46_grp, gpio47_grp, gpio48_grp, gpio49_grp, gpio50_grp,
59 gpio51_grp, gpio52_grp, gpio53_grp, gpio54_grp, gpio55_grp,
60 gpio56_grp, gpio57_grp, gpio58_grp, gpio59_grp, gpio60_grp,
61 gpio61_grp, gpio62_grp, gpio63_grp, gpio64_grp, gpio65_grp,
62 gpio66_grp, gpio67_grp, eth1_grp, i2s0_grp, i2s0_mclkin_grp,
63 i2s1_grp, i2s1_mclkin_grp, spi0_grp
64
65- function: An array of strings, each string containing the name of the
66 pinmux functions. The following are the list of pinmux
67 functions available:
68
69 nand, spi, emmc, sdio, eth0, pwm0, pwm1, pwm2, pwm3, pwm4,
70 pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11, pwm12, pwm13,
71 pwm14, pwm15, pwm16, pwm17, pwm18, pwm19, pwm20, pwm21, pwm22,
72 pwm23, pwm24, pwm25, pwm26, pwm27, pwm28, pwm29, pwm30, pwm31,
73 pwm32, pwm33, pwm34, pwm35, pwm36, i2c0, i2c1, i2c2, i2c3,
74 i2c4, uart0, uart1, uart2, uart3, uart4, uart5, uart6, uart7,
75 uart8, uart9, uart10, uart11, uart12, uart13, uart14, uart15,
76 gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, gpio8,
77 gpio9, gpio10, gpio11, gpio12, gpio13, gpio14, gpio15, gpio16,
78 gpio17, gpio18, gpio19, gpio20, gpio21, gpio22, gpio23,
79 gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
80 gpio31, gpio32, gpio33, gpio34, gpio35, gpio36, gpio37,
81 gpio38, gpio39, gpio40, gpio41, gpio42, gpio43, gpio44,
82 gpio45, gpio46, gpio47, gpio48, gpio49, gpio50, gpio51,
83 gpio52, gpio53, gpio54, gpio55, gpio56, gpio57, gpio58,
84 gpio59, gpio60, gpio61, gpio62, gpio63, gpio64, gpio65,
85 gpio66, gpio67, eth1, i2s0, i2s0_mclkin, i2s1, i2s1_mclkin,
86 spi0
87
88Optional Properties:
89
90- bias-disable: No arguments. Disable pin bias.
91- bias-pull-down: No arguments. The specified pins should be configured as
92 pull down.
93- bias-pull-up: No arguments. The specified pins should be configured as
94 pull up.
95- input-schmitt-enable: No arguments: Enable schmitt trigger for the specified
96 pins
97- input-schmitt-disable: No arguments: Disable schmitt trigger for the specified
98 pins
99- slew-rate: Integer. Sets slew rate for the specified pins.
100 Valid values are:
101 <0> - Slow
102 <1> - Fast
103- drive-strength: Integer. Selects the drive strength for the specified
104 pins in mA.
105 Valid values are:
106 <4>
107 <8>
108 <12>
109 <16>
110 <20>
111 <24>
112 <28>
113 <32>
114
115Example:
116 pinctrl: pinctrl@400 {
117 compatible = "bitmain,bm1880-pinctrl";
118 reg = <0x400 0x120>;
119
120 pinctrl_uart0_default: uart0-default {
121 pinmux {
122 groups = "uart0_grp";
123 function = "uart0";
124 };
125 };
126 };