| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | Hisilicon hip04 Ethernet Controller |
| 2 | |
| 3 | * Ethernet controller node |
| 4 | |
| 5 | Required properties: |
| 6 | - compatible: should be "hisilicon,hip04-mac". |
| 7 | - reg: address and length of the register set for the device. |
| 8 | - interrupts: interrupt for the device. |
| 9 | - port-handle: <phandle port channel> |
| 10 | phandle, specifies a reference to the syscon ppe node |
| 11 | port, port number connected to the controller |
| 12 | channel, recv channel start from channel * number (RX_DESC_NUM) |
| 13 | group, field in the pkg desc, in general, it is the same as the port. |
| 14 | - phy-mode: see ethernet.txt [1]. |
| 15 | |
| 16 | Optional properties: |
| 17 | - phy-handle: see ethernet.txt [1]. |
| 18 | |
| 19 | [1] Documentation/devicetree/bindings/net/ethernet.txt |
| 20 | |
| 21 | |
| 22 | * Ethernet ppe node: |
| 23 | Control rx & tx fifos of all ethernet controllers. |
| 24 | Have 2048 recv channels shared by all ethernet controllers, only if no overlap. |
| 25 | Each controller's recv channel start from channel * number (RX_DESC_NUM). |
| 26 | |
| 27 | Required properties: |
| 28 | - compatible: "hisilicon,hip04-ppe", "syscon". |
| 29 | - reg: address and length of the register set for the device. |
| 30 | |
| 31 | |
| 32 | * MDIO bus node: |
| 33 | |
| 34 | Required properties: |
| 35 | |
| 36 | - compatible: should be "hisilicon,mdio". |
| 37 | - Inherits from MDIO bus node binding [2] |
| 38 | [2] Documentation/devicetree/bindings/net/phy.txt |
| 39 | |
| 40 | Example: |
| 41 | mdio { |
| 42 | compatible = "hisilicon,mdio"; |
| 43 | reg = <0x28f1000 0x1000>; |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | |
| 47 | phy0: ethernet-phy@0 { |
| 48 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 49 | reg = <0>; |
| 50 | marvell,reg-init = <18 0x14 0 0x8001>; |
| 51 | }; |
| 52 | |
| 53 | phy1: ethernet-phy@1 { |
| 54 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 55 | reg = <1>; |
| 56 | marvell,reg-init = <18 0x14 0 0x8001>; |
| 57 | }; |
| 58 | }; |
| 59 | |
| 60 | ppe: ppe@28c0000 { |
| 61 | compatible = "hisilicon,hip04-ppe", "syscon"; |
| 62 | reg = <0x28c0000 0x10000>; |
| 63 | }; |
| 64 | |
| 65 | fe: ethernet@28b0000 { |
| 66 | compatible = "hisilicon,hip04-mac"; |
| 67 | reg = <0x28b0000 0x10000>; |
| 68 | interrupts = <0 413 4>; |
| 69 | phy-mode = "mii"; |
| 70 | port-handle = <&ppe 31 0 31>; |
| 71 | }; |
| 72 | |
| 73 | ge0: ethernet@2800000 { |
| 74 | compatible = "hisilicon,hip04-mac"; |
| 75 | reg = <0x2800000 0x10000>; |
| 76 | interrupts = <0 402 4>; |
| 77 | phy-mode = "sgmii"; |
| 78 | port-handle = <&ppe 0 1 0>; |
| 79 | phy-handle = <&phy0>; |
| 80 | }; |
| 81 | |
| 82 | ge8: ethernet@2880000 { |
| 83 | compatible = "hisilicon,hip04-mac"; |
| 84 | reg = <0x2880000 0x10000>; |
| 85 | interrupts = <0 410 4>; |
| 86 | phy-mode = "sgmii"; |
| 87 | port-handle = <&ppe 8 2 8>; |
| 88 | phy-handle = <&phy1>; |
| 89 | }; |