| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | * PIP Ethernet nexus. |
| 2 | |
| 3 | The PIP Ethernet nexus can control several data packet input/output |
| 4 | devices. The devices have a two level grouping scheme. There may be |
| 5 | several interfaces, and each interface may have several ports. These |
| 6 | ports might be an individual Ethernet PHY. |
| 7 | |
| 8 | |
| 9 | Properties for the PIP nexus: |
| 10 | - compatible: "cavium,octeon-3860-pip" |
| 11 | |
| 12 | Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. |
| 13 | |
| 14 | - reg: The base address of the PIP's register bank. |
| 15 | |
| 16 | - #address-cells: Must be <1>. |
| 17 | |
| 18 | - #size-cells: Must be <0>. |
| 19 | |
| 20 | Properties for PIP interfaces which is a child the PIP nexus: |
| 21 | - compatible: "cavium,octeon-3860-pip-interface" |
| 22 | |
| 23 | Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. |
| 24 | |
| 25 | - reg: The interface number. |
| 26 | |
| 27 | - #address-cells: Must be <1>. |
| 28 | |
| 29 | - #size-cells: Must be <0>. |
| 30 | |
| 31 | Properties for PIP port which is a child the PIP interface: |
| 32 | - compatible: "cavium,octeon-3860-pip-port" |
| 33 | |
| 34 | Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. |
| 35 | |
| 36 | - reg: The port number within the interface group. |
| 37 | |
| 38 | - phy-handle: Optional, see ethernet.txt file in the same directory. |
| 39 | |
| 40 | - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0. |
| 41 | Value range is 1-31, and mapping to the actual delay varies depending on HW. |
| 42 | |
| 43 | - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0. |
| 44 | Value range is 1-31, and mapping to the actual delay varies depending on HW. |
| 45 | |
| 46 | Example: |
| 47 | |
| 48 | pip@11800a0000000 { |
| 49 | compatible = "cavium,octeon-3860-pip"; |
| 50 | #address-cells = <1>; |
| 51 | #size-cells = <0>; |
| 52 | reg = <0x11800 0xa0000000 0x0 0x2000>; |
| 53 | |
| 54 | interface@0 { |
| 55 | compatible = "cavium,octeon-3860-pip-interface"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <0>; |
| 58 | reg = <0>; /* interface */ |
| 59 | |
| 60 | ethernet@0 { |
| 61 | compatible = "cavium,octeon-3860-pip-port"; |
| 62 | reg = <0x0>; /* Port */ |
| 63 | local-mac-address = [ 00 0f b7 10 63 60 ]; |
| 64 | phy-handle = <&phy2>; |
| 65 | }; |
| 66 | ethernet@1 { |
| 67 | compatible = "cavium,octeon-3860-pip-port"; |
| 68 | reg = <0x1>; /* Port */ |
| 69 | local-mac-address = [ 00 0f b7 10 63 61 ]; |
| 70 | phy-handle = <&phy3>; |
| 71 | }; |
| 72 | ethernet@2 { |
| 73 | compatible = "cavium,octeon-3860-pip-port"; |
| 74 | reg = <0x2>; /* Port */ |
| 75 | local-mac-address = [ 00 0f b7 10 63 62 ]; |
| 76 | phy-handle = <&phy4>; |
| 77 | }; |
| 78 | ethernet@3 { |
| 79 | compatible = "cavium,octeon-3860-pip-port"; |
| 80 | reg = <0x3>; /* Port */ |
| 81 | local-mac-address = [ 00 0f b7 10 63 63 ]; |
| 82 | phy-handle = <&phy5>; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | interface@1 { |
| 87 | compatible = "cavium,octeon-3860-pip-interface"; |
| 88 | #address-cells = <1>; |
| 89 | #size-cells = <0>; |
| 90 | reg = <1>; /* interface */ |
| 91 | |
| 92 | ethernet@0 { |
| 93 | compatible = "cavium,octeon-3860-pip-port"; |
| 94 | reg = <0x0>; /* Port */ |
| 95 | local-mac-address = [ 00 0f b7 10 63 64 ]; |
| 96 | phy-handle = <&phy6>; |
| 97 | }; |
| 98 | }; |
| 99 | }; |