| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mtd/nand-chip.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NAND Chip Common Properties |
| 8 | |
| 9 | maintainers: |
| 10 | - Miquel Raynal <miquel.raynal@bootlin.com> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: mtd.yaml# |
| 14 | |
| 15 | description: | |
| 16 | This file covers the generic description of a NAND chip. It implies that the |
| 17 | bus interface should not be taken into account: both raw NAND devices and |
| 18 | SPI-NAND devices are concerned by this description. |
| 19 | |
| 20 | properties: |
| 21 | reg: |
| 22 | description: |
| 23 | Contains the chip-select IDs. |
| 24 | |
| 25 | nand-ecc-engine: |
| 26 | description: | |
| 27 | A phandle on the hardware ECC engine if any. There are |
| 28 | basically three possibilities: |
| 29 | 1/ The ECC engine is part of the NAND controller, in this |
| 30 | case the phandle should reference the parent node. |
| 31 | 2/ The ECC engine is part of the NAND part (on-die), in this |
| 32 | case the phandle should reference the node itself. |
| 33 | 3/ The ECC engine is external, in this case the phandle should |
| 34 | reference the specific ECC engine node. |
| 35 | $ref: /schemas/types.yaml#/definitions/phandle |
| 36 | |
| 37 | nand-use-soft-ecc-engine: |
| 38 | description: Use a software ECC engine. |
| 39 | type: boolean |
| 40 | |
| 41 | nand-no-ecc-engine: |
| 42 | description: Do not use any ECC correction. |
| 43 | type: boolean |
| 44 | |
| 45 | nand-ecc-algo: |
| 46 | description: |
| 47 | Desired ECC algorithm. |
| 48 | $ref: /schemas/types.yaml#/definitions/string |
| 49 | enum: [hamming, bch, rs] |
| 50 | |
| 51 | nand-ecc-strength: |
| 52 | description: |
| 53 | Maximum number of bits that can be corrected per ECC step. |
| 54 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 55 | minimum: 1 |
| 56 | |
| 57 | nand-ecc-step-size: |
| 58 | description: |
| 59 | Number of data bytes covered by a single ECC step. |
| 60 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 61 | minimum: 1 |
| 62 | |
| 63 | secure-regions: |
| 64 | description: |
| 65 | Regions in the NAND chip which are protected using a secure element |
| 66 | like Trustzone. This property contains the start address and size of |
| 67 | the secure regions present. |
| 68 | $ref: /schemas/types.yaml#/definitions/uint64-matrix |
| 69 | |
| 70 | required: |
| 71 | - reg |
| 72 | |
| 73 | # This file can be referenced by more specific devices (like spi-nands) |
| 74 | additionalProperties: true |