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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / i2c / qcom,i2c-cci.yaml
blob: f0eabff863106afdaf8547fceb0126ae1147dc88 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Control Interface (CCI) I2C controller
8
9maintainers:
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
12
13properties:
14 compatible:
15 oneOf:
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
20
21 - items:
22 - enum:
23 - qcom,msm8916-cci
24 - const: qcom,msm8226-cci # CCI v1
25
26 - items:
27 - enum:
28 - qcom,sc7280-cci
29 - qcom,sdm845-cci
30 - qcom,sm6350-cci
31 - qcom,sm8250-cci
32 - qcom,sm8450-cci
33 - const: qcom,msm8996-cci # CCI v2
34
35 "#address-cells":
36 const: 1
37
38 "#size-cells":
39 const: 0
40
41 clocks:
42 minItems: 3
43 maxItems: 6
44
45 clock-names:
46 minItems: 3
47 maxItems: 6
48
49 interrupts:
50 maxItems: 1
51
52 power-domains:
53 maxItems: 1
54
55 reg:
56 maxItems: 1
57
58patternProperties:
59 "^i2c-bus@[01]$":
60 $ref: /schemas/i2c/i2c-controller.yaml#
61 unevaluatedProperties: false
62
63 properties:
64 reg:
65 maxItems: 1
66
67 clock-frequency:
68 default: 100000
69
70required:
71 - compatible
72 - clock-names
73 - clocks
74 - interrupts
75 - reg
76
77allOf:
78 - if:
79 properties:
80 compatible:
81 contains:
82 enum:
83 - qcom,msm8996-cci
84 then:
85 required:
86 - power-domains
87
88 - if:
89 properties:
90 compatible:
91 contains:
92 enum:
93 - qcom,msm8226-cci
94 - qcom,msm8916-cci
95 then:
96 properties:
97 i2c-bus@1: false
98
99 - if:
100 properties:
101 compatible:
102 oneOf:
103 - contains:
104 enum:
105 - qcom,msm8974-cci
106
107 - const: qcom,msm8226-cci
108 then:
109 properties:
110 clocks:
111 maxItems: 3
112 clock-names:
113 items:
114 - const: camss_top_ahb
115 - const: cci_ahb
116 - const: cci
117
118 - if:
119 properties:
120 compatible:
121 oneOf:
122 - contains:
123 enum:
124 - qcom,msm8916-cci
125
126 - const: qcom,msm8996-cci
127 then:
128 properties:
129 clocks:
130 maxItems: 4
131 clock-names:
132 items:
133 - const: camss_top_ahb
134 - const: cci_ahb
135 - const: cci
136 - const: camss_ahb
137
138 - if:
139 properties:
140 compatible:
141 contains:
142 enum:
143 - qcom,sdm845-cci
144 - qcom,sm6350-cci
145 then:
146 properties:
147 clocks:
148 minItems: 6
149 clock-names:
150 items:
151 - const: camnoc_axi
152 - const: soc_ahb
153 - const: slow_ahb_src
154 - const: cpas_ahb
155 - const: cci
156 - const: cci_src
157
158 - if:
159 properties:
160 compatible:
161 contains:
162 enum:
163 - qcom,sc7280-cci
164 - qcom,sm8250-cci
165 - qcom,sm8450-cci
166 then:
167 properties:
168 clocks:
169 minItems: 5
170 maxItems: 5
171 clock-names:
172 items:
173 - const: camnoc_axi
174 - const: slow_ahb_src
175 - const: cpas_ahb
176 - const: cci
177 - const: cci_src
178
179additionalProperties: false
180
181examples:
182 - |
183 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
184 #include <dt-bindings/gpio/gpio.h>
185 #include <dt-bindings/interrupt-controller/arm-gic.h>
186
187 cci@ac4a000 {
188 reg = <0x0ac4a000 0x4000>;
189 compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
190 #address-cells = <1>;
191 #size-cells = <0>;
192
193 interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
194 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
195
196 clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
197 <&clock_camcc CAM_CC_SOC_AHB_CLK>,
198 <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
199 <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
200 <&clock_camcc CAM_CC_CCI_CLK>,
201 <&clock_camcc CAM_CC_CCI_CLK_SRC>;
202 clock-names = "camnoc_axi",
203 "soc_ahb",
204 "slow_ahb_src",
205 "cpas_ahb",
206 "cci",
207 "cci_src";
208
209 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
210 <&clock_camcc CAM_CC_CCI_CLK>;
211 assigned-clock-rates = <80000000>,
212 <37500000>;
213
214 pinctrl-names = "default", "sleep";
215 pinctrl-0 = <&cci0_default &cci1_default>;
216 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
217
218 i2c-bus@0 {
219 reg = <0>;
220 clock-frequency = <1000000>;
221 #address-cells = <1>;
222 #size-cells = <0>;
223
224 camera@10 {
225 compatible = "ovti,ov8856";
226 reg = <0x10>;
227
228 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&cam0_default>;
231
232 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
233 clock-names = "xvclk";
234 clock-frequency = <19200000>;
235
236 dovdd-supply = <&vreg_lvs1a_1p8>;
237 avdd-supply = <&cam0_avdd_2v8>;
238 dvdd-supply = <&cam0_dvdd_1v2>;
239
240 port {
241 ov8856_ep: endpoint {
242 link-frequencies = /bits/ 64 <360000000 180000000>;
243 data-lanes = <1 2 3 4>;
244 remote-endpoint = <&csiphy0_ep>;
245 };
246 };
247 };
248 };
249
250 cci_i2c1: i2c-bus@1 {
251 reg = <1>;
252 clock-frequency = <1000000>;
253 #address-cells = <1>;
254 #size-cells = <0>;
255
256 camera@60 {
257 compatible = "ovti,ov7251";
258 reg = <0x60>;
259
260 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&cam3_default>;
263
264 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
265 clock-names = "xclk";
266 clock-frequency = <24000000>;
267
268 vdddo-supply = <&vreg_lvs1a_1p8>;
269 vdda-supply = <&cam3_avdd_2v8>;
270
271 port {
272 ov7251_ep: endpoint {
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]273 data-lanes = <0>;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]274 link-frequencies = /bits/ 64 <240000000 319200000>;
275 remote-endpoint = <&csiphy3_ep>;
276 };
277 };
278 };
279 };
280 };