Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | # Copyright (c) 2023 Imagination Technologies Ltd. |
| 3 | %YAML 1.2 |
| 4 | --- |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 5 | $id: http://devicetree.org/schemas/gpu/img,powervr-rogue.yaml# |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 8 | title: Imagination Technologies PowerVR and IMG Rogue GPUs |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 9 | |
| 10 | maintainers: |
| 11 | - Frank Binns <frank.binns@imgtec.com> |
| 12 | |
| 13 | properties: |
| 14 | compatible: |
| 15 | items: |
| 16 | - enum: |
| 17 | - ti,am62-gpu |
| 18 | - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | clocks: |
| 24 | minItems: 1 |
| 25 | maxItems: 3 |
| 26 | |
| 27 | clock-names: |
| 28 | items: |
| 29 | - const: core |
| 30 | - const: mem |
| 31 | - const: sys |
| 32 | minItems: 1 |
| 33 | |
| 34 | interrupts: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | power-domains: |
| 38 | maxItems: 1 |
| 39 | |
| 40 | required: |
| 41 | - compatible |
| 42 | - reg |
| 43 | - clocks |
| 44 | - clock-names |
| 45 | - interrupts |
| 46 | |
| 47 | additionalProperties: false |
| 48 | |
| 49 | allOf: |
| 50 | - if: |
| 51 | properties: |
| 52 | compatible: |
| 53 | contains: |
| 54 | const: ti,am62-gpu |
| 55 | then: |
| 56 | properties: |
| 57 | clocks: |
| 58 | maxItems: 1 |
| 59 | |
| 60 | examples: |
| 61 | - | |
| 62 | #include <dt-bindings/interrupt-controller/irq.h> |
| 63 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 64 | #include <dt-bindings/soc/ti,sci_pm_domain.h> |
| 65 | |
| 66 | gpu@fd00000 { |
| 67 | compatible = "ti,am62-gpu", "img,img-axe"; |
| 68 | reg = <0x0fd00000 0x20000>; |
| 69 | clocks = <&k3_clks 187 0>; |
| 70 | clock-names = "core"; |
| 71 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| 72 | power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; |
| 73 | }; |