Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore |
| 8 | |
| 9 | maintainers: |
| 10 | - Nava kishore Manne <nava.kishore.manne@amd.com> |
| 11 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 12 | allOf: |
| 13 | - $ref: fpga-bridge.yaml# |
| 14 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 15 | description: | |
| 16 | The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more |
| 17 | decouplers/fpga bridges. The controller can decouple/disable the bridges |
| 18 | which prevents signal changes from passing through the bridge. The controller |
| 19 | can also couple / enable the bridges which allows traffic to pass through the |
| 20 | bridge normally. |
| 21 | Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore |
| 22 | is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function |
| 23 | eXchange AXI shutdown manager prevents AXI traffic from passing through the |
| 24 | bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a |
| 25 | Reconfigurable Partition when it is undergoing dynamic reconfiguration, |
| 26 | preventing the system deadlock that can occur if AXI transactions are |
| 27 | interrupted by DFX. |
| 28 | Please refer to fpga-region.txt and fpga-bridge.txt in this directory for |
| 29 | common binding part and usage. |
| 30 | |
| 31 | properties: |
| 32 | compatible: |
| 33 | oneOf: |
| 34 | - items: |
| 35 | - const: xlnx,pr-decoupler-1.00 |
| 36 | - const: xlnx,pr-decoupler |
| 37 | - items: |
| 38 | - const: xlnx,dfx-axi-shutdown-manager-1.00 |
| 39 | - const: xlnx,dfx-axi-shutdown-manager |
| 40 | |
| 41 | reg: |
| 42 | maxItems: 1 |
| 43 | |
| 44 | clocks: |
| 45 | maxItems: 1 |
| 46 | |
| 47 | clock-names: |
| 48 | items: |
| 49 | - const: aclk |
| 50 | |
| 51 | required: |
| 52 | - compatible |
| 53 | - reg |
| 54 | - clocks |
| 55 | - clock-names |
| 56 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 57 | unevaluatedProperties: false |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 58 | |
| 59 | examples: |
| 60 | - | |
| 61 | fpga-bridge@100000450 { |
| 62 | compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler"; |
| 63 | reg = <0x10000045 0x10>; |
| 64 | clocks = <&clkc 15>; |
| 65 | clock-names = "aclk"; |
| 66 | }; |
| 67 | ... |