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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / display / renesas,du.yaml
blob: c5b9e6812bceccc92b78d0e8a83f610f32e8360b [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/renesas,du.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car Display Unit (DU)
8
9maintainers:
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11
12description: |
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
15
16properties:
17 compatible:
18 enum:
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
22 - renesas,du-r8a7745 # for RZ/G1E compatible DU
23 - renesas,du-r8a77470 # for RZ/G1C compatible DU
24 - renesas,du-r8a774a1 # for RZ/G2M compatible DU
25 - renesas,du-r8a774b1 # for RZ/G2N compatible DU
26 - renesas,du-r8a774c0 # for RZ/G2E compatible DU
27 - renesas,du-r8a774e1 # for RZ/G2H compatible DU
28 - renesas,du-r8a7779 # for R-Car H1 compatible DU
29 - renesas,du-r8a7790 # for R-Car H2 compatible DU
30 - renesas,du-r8a7791 # for R-Car M2-W compatible DU
31 - renesas,du-r8a7792 # for R-Car V2H compatible DU
32 - renesas,du-r8a7793 # for R-Car M2-N compatible DU
33 - renesas,du-r8a7794 # for R-Car E2 compatible DU
34 - renesas,du-r8a7795 # for R-Car H3 compatible DU
35 - renesas,du-r8a7796 # for R-Car M3-W compatible DU
36 - renesas,du-r8a77961 # for R-Car M3-W+ compatible DU
37 - renesas,du-r8a77965 # for R-Car M3-N compatible DU
38 - renesas,du-r8a77970 # for R-Car V3M compatible DU
39 - renesas,du-r8a77980 # for R-Car V3H compatible DU
40 - renesas,du-r8a77990 # for R-Car E3 compatible DU
41 - renesas,du-r8a77995 # for R-Car D3 compatible DU
42 - renesas,du-r8a779a0 # for R-Car V3U compatible DU
43 - renesas,du-r8a779g0 # for R-Car V4H compatible DU
44
45 reg:
46 maxItems: 1
47
48 # See compatible-specific constraints below.
49 clocks: true
50 clock-names: true
51 interrupts:
52 description: Interrupt specifiers, one per DU channel
53 resets: true
54 reset-names: true
55
56 power-domains:
57 maxItems: 1
58
59 ports:
60 $ref: /schemas/graph.yaml#/properties/ports
61 description: |
62 The connections to the DU output video ports are modeled using the OF
63 graph bindings specified in Documentation/devicetree/bindings/graph.txt.
64 The number of ports and their assignment are model-dependent. Each port
65 shall have a single endpoint.
66
67 patternProperties:
68 "^port@[0-3]$":
69 $ref: /schemas/graph.yaml#/properties/port
70 unevaluatedProperties: false
71
72 required:
73 - port@0
74 - port@1
75
76 unevaluatedProperties: false
77
78 renesas,cmms:
79 $ref: /schemas/types.yaml#/definitions/phandle-array
80 items:
81 maxItems: 1
82 description:
83 A list of phandles to the CMM instances present in the SoC, one for each
84 available DU channel.
85
86 renesas,vsps:
87 $ref: /schemas/types.yaml#/definitions/phandle-array
88 items:
89 items:
90 - description: phandle to VSP instance that serves the DU channel
91 - description: Channel index identifying the LIF instance in that VSP
92 description:
93 A list of phandle and channel index tuples to the VSPs that handle the
94 memory interfaces for the DU channels.
95
96required:
97 - compatible
98 - reg
99 - clocks
100 - interrupts
101 - ports
102
103allOf:
104 - if:
105 properties:
106 compatible:
107 contains:
108 const: renesas,du-r8a7779
109 then:
110 properties:
111 clocks:
112 minItems: 1
113 items:
114 - description: Functional clock
115 - description: DU_DOTCLKIN0 input clock
116 - description: DU_DOTCLKIN1 input clock
117
118 clock-names:
119 minItems: 1
120 items:
121 - const: du.0
122 - pattern: '^dclkin\.[01]$'
123 - pattern: '^dclkin\.[01]$'
124
125 interrupts:
126 maxItems: 1
127
128 resets:
129 maxItems: 1
130
131 ports:
132 properties:
133 port@0:
134 description: DPAD 0
135 port@1:
136 description: DPAD 1
137 # port@2 is TCON, not supported yet
138 port@2: false
139 port@3: false
140
141 required:
142 - port@0
143 - port@1
144
145 required:
146 - interrupts
147
148 - if:
149 properties:
150 compatible:
151 contains:
152 enum:
153 - renesas,du-r8a7743
154 - renesas,du-r8a7744
155 - renesas,du-r8a7791
156 - renesas,du-r8a7793
157 then:
158 properties:
159 clocks:
160 minItems: 2
161 items:
162 - description: Functional clock for DU0
163 - description: Functional clock for DU1
164 - description: DU_DOTCLKIN0 input clock
165 - description: DU_DOTCLKIN1 input clock
166
167 clock-names:
168 minItems: 2
169 items:
170 - const: du.0
171 - const: du.1
172 - pattern: '^dclkin\.[01]$'
173 - pattern: '^dclkin\.[01]$'
174
175 interrupts:
176 maxItems: 2
177
178 resets:
179 maxItems: 1
180
181 reset-names:
182 items:
183 - const: du.0
184
185 ports:
186 properties:
187 port@0:
188 description: DPAD 0
189 port@1:
190 description: LVDS 0
191 # port@2 is TCON, not supported yet
192 port@2: false
193 port@3: false
194
195 required:
196 - port@0
197 - port@1
198
199 required:
200 - clock-names
201 - interrupts
202 - resets
203 - reset-names
204
205 - if:
206 properties:
207 compatible:
208 contains:
209 enum:
210 - renesas,du-r8a7745
211 - renesas,du-r8a7792
212 then:
213 properties:
214 clocks:
215 minItems: 2
216 items:
217 - description: Functional clock for DU0
218 - description: Functional clock for DU1
219 - description: DU_DOTCLKIN0 input clock
220 - description: DU_DOTCLKIN1 input clock
221
222 clock-names:
223 minItems: 2
224 items:
225 - const: du.0
226 - const: du.1
227 - pattern: '^dclkin\.[01]$'
228 - pattern: '^dclkin\.[01]$'
229
230 interrupts:
231 maxItems: 2
232
233 resets:
234 maxItems: 1
235
236 reset-names:
237 items:
238 - const: du.0
239
240 ports:
241 properties:
242 port@0:
243 description: DPAD 0
244 port@1:
245 description: DPAD 1
246 port@2: false
247 port@3: false
248
249 required:
250 - port@0
251 - port@1
252
253 required:
254 - clock-names
255 - interrupts
256 - resets
257 - reset-names
258
259 - if:
260 properties:
261 compatible:
262 contains:
263 enum:
264 - renesas,du-r8a7794
265 then:
266 properties:
267 clocks:
268 minItems: 2
269 items:
270 - description: Functional clock for DU0
271 - description: Functional clock for DU1
272 - description: DU_DOTCLKIN0 input clock
273 - description: DU_DOTCLKIN1 input clock
274
275 clock-names:
276 minItems: 2
277 items:
278 - const: du.0
279 - const: du.1
280 - pattern: '^dclkin\.[01]$'
281 - pattern: '^dclkin\.[01]$'
282
283 interrupts:
284 maxItems: 2
285
286 resets:
287 maxItems: 1
288
289 reset-names:
290 items:
291 - const: du.0
292
293 ports:
294 properties:
295 port@0:
296 description: DPAD 0
297 port@1:
298 description: DPAD 1
299 # port@2 is TCON, not supported yet
300 port@2: false
301 port@3: false
302
303 required:
304 - port@0
305 - port@1
306
307 required:
308 - clock-names
309 - interrupts
310 - resets
311 - reset-names
312
313 - if:
314 properties:
315 compatible:
316 contains:
317 enum:
318 - renesas,du-r8a77470
319 then:
320 properties:
321 clocks:
322 minItems: 2
323 items:
324 - description: Functional clock for DU0
325 - description: Functional clock for DU1
326 - description: DU_DOTCLKIN0 input clock
327 - description: DU_DOTCLKIN1 input clock
328
329 clock-names:
330 minItems: 2
331 items:
332 - const: du.0
333 - const: du.1
334 - pattern: '^dclkin\.[01]$'
335 - pattern: '^dclkin\.[01]$'
336
337 interrupts:
338 maxItems: 2
339
340 resets:
341 maxItems: 1
342
343 reset-names:
344 items:
345 - const: du.0
346
347 ports:
348 properties:
349 port@0:
350 description: DPAD 0
351 port@1:
352 description: DPAD 1
353 port@2:
354 description: LVDS 0
355 # port@3 is DVENC, not supported yet
356 port@3: false
357
358 required:
359 - port@0
360 - port@1
361 - port@2
362
363 required:
364 - clock-names
365 - interrupts
366 - resets
367 - reset-names
368
369 - if:
370 properties:
371 compatible:
372 contains:
373 enum:
374 - renesas,du-r8a7742
375 - renesas,du-r8a7790
376 then:
377 properties:
378 clocks:
379 minItems: 3
380 items:
381 - description: Functional clock for DU0
382 - description: Functional clock for DU1
383 - description: Functional clock for DU2
384 - description: DU_DOTCLKIN0 input clock
385 - description: DU_DOTCLKIN1 input clock
386 - description: DU_DOTCLKIN2 input clock
387
388 clock-names:
389 minItems: 3
390 items:
391 - const: du.0
392 - const: du.1
393 - const: du.2
394 - pattern: '^dclkin\.[012]$'
395 - pattern: '^dclkin\.[012]$'
396 - pattern: '^dclkin\.[012]$'
397
398 interrupts:
399 maxItems: 3
400
401 resets:
402 maxItems: 1
403
404 reset-names:
405 items:
406 - const: du.0
407
408 ports:
409 properties:
410 port@0:
411 description: DPAD 0
412 port@1:
413 description: LVDS 0
414 port@2:
415 description: LVDS 1
416 # port@3 is TCON, not supported yet
417 port@3: false
418
419 required:
420 - port@0
421 - port@1
422 - port@2
423
424 required:
425 - clock-names
426 - interrupts
427 - resets
428 - reset-names
429
430 - if:
431 properties:
432 compatible:
433 contains:
434 enum:
435 - renesas,du-r8a7795
436 then:
437 properties:
438 clocks:
439 minItems: 4
440 items:
441 - description: Functional clock for DU0
442 - description: Functional clock for DU1
443 - description: Functional clock for DU2
444 - description: Functional clock for DU4
445 - description: DU_DOTCLKIN0 input clock
446 - description: DU_DOTCLKIN1 input clock
447 - description: DU_DOTCLKIN2 input clock
448 - description: DU_DOTCLKIN3 input clock
449
450 clock-names:
451 minItems: 4
452 items:
453 - const: du.0
454 - const: du.1
455 - const: du.2
456 - const: du.3
457 - pattern: '^dclkin\.[0123]$'
458 - pattern: '^dclkin\.[0123]$'
459 - pattern: '^dclkin\.[0123]$'
460 - pattern: '^dclkin\.[0123]$'
461
462 interrupts:
463 maxItems: 4
464
465 resets:
466 maxItems: 2
467
468 reset-names:
469 items:
470 - const: du.0
471 - const: du.2
472
473 ports:
474 properties:
475 port@0:
476 description: DPAD 0
477 port@1:
478 description: HDMI 0
479 port@2:
480 description: HDMI 1
481 port@3:
482 description: LVDS 0
483
484 required:
485 - port@0
486 - port@1
487 - port@2
488 - port@3
489
490 renesas,cmms:
491 minItems: 4
492
493 renesas,vsps:
494 minItems: 4
495
496 required:
497 - clock-names
498 - interrupts
499 - resets
500 - reset-names
501 - renesas,vsps
502
503 - if:
504 properties:
505 compatible:
506 contains:
507 enum:
508 - renesas,du-r8a774a1
509 - renesas,du-r8a7796
510 - renesas,du-r8a77961
511 then:
512 properties:
513 clocks:
514 minItems: 3
515 items:
516 - description: Functional clock for DU0
517 - description: Functional clock for DU1
518 - description: Functional clock for DU2
519 - description: DU_DOTCLKIN0 input clock
520 - description: DU_DOTCLKIN1 input clock
521 - description: DU_DOTCLKIN2 input clock
522
523 clock-names:
524 minItems: 3
525 items:
526 - const: du.0
527 - const: du.1
528 - const: du.2
529 - pattern: '^dclkin\.[012]$'
530 - pattern: '^dclkin\.[012]$'
531 - pattern: '^dclkin\.[012]$'
532
533 interrupts:
534 maxItems: 3
535
536 resets:
537 maxItems: 2
538
539 reset-names:
540 items:
541 - const: du.0
542 - const: du.2
543
544 ports:
545 properties:
546 port@0:
547 description: DPAD 0
548 port@1:
549 description: HDMI 0
550 port@2:
551 description: LVDS 0
552 port@3: false
553
554 required:
555 - port@0
556 - port@1
557 - port@2
558
559 renesas,cmms:
560 minItems: 3
561
562 renesas,vsps:
563 minItems: 3
564
565 required:
566 - clock-names
567 - interrupts
568 - resets
569 - reset-names
570 - renesas,vsps
571
572 - if:
573 properties:
574 compatible:
575 contains:
576 enum:
577 - renesas,du-r8a774b1
578 - renesas,du-r8a774e1
579 - renesas,du-r8a77965
580 then:
581 properties:
582 clocks:
583 minItems: 3
584 items:
585 - description: Functional clock for DU0
586 - description: Functional clock for DU1
587 - description: Functional clock for DU3
588 - description: DU_DOTCLKIN0 input clock
589 - description: DU_DOTCLKIN1 input clock
590 - description: DU_DOTCLKIN3 input clock
591
592 clock-names:
593 minItems: 3
594 items:
595 - const: du.0
596 - const: du.1
597 - const: du.3
598 - pattern: '^dclkin\.[013]$'
599 - pattern: '^dclkin\.[013]$'
600 - pattern: '^dclkin\.[013]$'
601
602 interrupts:
603 maxItems: 3
604
605 resets:
606 maxItems: 2
607
608 reset-names:
609 items:
610 - const: du.0
611 - const: du.3
612
613 ports:
614 properties:
615 port@0:
616 description: DPAD 0
617 port@1:
618 description: HDMI 0
619 port@2:
620 description: LVDS 0
621 port@3: false
622
623 required:
624 - port@0
625 - port@1
626 - port@2
627
628 renesas,cmms:
629 minItems: 3
630
631 renesas,vsps:
632 minItems: 3
633
634 required:
635 - clock-names
636 - interrupts
637 - resets
638 - reset-names
639 - renesas,vsps
640
641 - if:
642 properties:
643 compatible:
644 contains:
645 enum:
646 - renesas,du-r8a77970
647 - renesas,du-r8a77980
648 then:
649 properties:
650 clocks:
651 minItems: 1
652 items:
653 - description: Functional clock for DU0
654 - description: DU_DOTCLKIN0 input clock
655
656 clock-names:
657 minItems: 1
658 items:
659 - const: du.0
660 - const: dclkin.0
661
662 interrupts:
663 maxItems: 1
664
665 resets:
666 maxItems: 1
667
668 reset-names:
669 items:
670 - const: du.0
671
672 ports:
673 properties:
674 port@0:
675 description: DPAD 0
676 port@1:
677 description: LVDS 0
678 port@2: false
679 port@3: false
680
681 required:
682 - port@0
683 - port@1
684
685 renesas,vsps:
686 minItems: 1
687
688 required:
689 - clock-names
690 - interrupts
691 - resets
692 - reset-names
693 - renesas,vsps
694
695 - if:
696 properties:
697 compatible:
698 contains:
699 enum:
700 - renesas,du-r8a774c0
701 - renesas,du-r8a77990
702 - renesas,du-r8a77995
703 then:
704 properties:
705 clocks:
706 minItems: 2
707 items:
708 - description: Functional clock for DU0
709 - description: Functional clock for DU1
710 - description: DU_DOTCLKIN0 input clock
711 - description: DU_DOTCLKIN1 input clock
712
713 clock-names:
714 minItems: 2
715 items:
716 - const: du.0
717 - const: du.1
718 - pattern: '^dclkin\.[01]$'
719 - pattern: '^dclkin\.[01]$'
720
721 interrupts:
722 maxItems: 2
723
724 resets:
725 maxItems: 1
726
727 reset-names:
728 items:
729 - const: du.0
730
731 ports:
732 properties:
733 port@0:
734 description: DPAD 0
735 port@1:
736 description: LVDS 0
737 port@2:
738 description: LVDS 1
739 # port@3 is TCON, not supported yet
740 port@3: false
741
742 required:
743 - port@0
744 - port@1
745 - port@2
746
747 renesas,cmms:
748 minItems: 2
749
750 renesas,vsps:
751 minItems: 2
752
753 required:
754 - clock-names
755 - interrupts
756 - resets
757 - reset-names
758 - renesas,vsps
759
760 - if:
761 properties:
762 compatible:
763 contains:
764 enum:
765 - renesas,du-r8a779a0
766 - renesas,du-r8a779g0
767 then:
768 properties:
769 clocks:
770 items:
771 - description: Functional clock
772
773 clock-names:
774 items:
775 - const: du.0
776
777 interrupts:
778 maxItems: 2
779
780 resets:
781 maxItems: 1
782
783 reset-names:
784 items:
785 - const: du.0
786
787 ports:
788 properties:
789 port@0:
790 description: DSI 0
791 port@1:
792 description: DSI 1
793 port@2: false
794 port@3: false
795
796 required:
797 - port@0
798 - port@1
799
800 renesas,vsps:
801 minItems: 2
802
803 required:
804 - clock-names
805 - interrupts
806 - resets
807 - reset-names
808 - renesas,vsps
809
810additionalProperties: false
811
812examples:
813 # R-Car H3 ES2.0 DU
814 - |
815 #include <dt-bindings/clock/renesas-cpg-mssr.h>
816 #include <dt-bindings/interrupt-controller/arm-gic.h>
817
818 display@feb00000 {
819 compatible = "renesas,du-r8a7795";
820 reg = <0xfeb00000 0x80000>;
821 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
825 clocks = <&cpg CPG_MOD 724>,
826 <&cpg CPG_MOD 723>,
827 <&cpg CPG_MOD 722>,
828 <&cpg CPG_MOD 721>;
829 clock-names = "du.0", "du.1", "du.2", "du.3";
830 resets = <&cpg 724>, <&cpg 722>;
831 reset-names = "du.0", "du.2";
832
833 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
834 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
835
836 ports {
837 #address-cells = <1>;
838 #size-cells = <0>;
839
840 port@0 {
841 reg = <0>;
842 endpoint {
843 remote-endpoint = <&adv7123_in>;
844 };
845 };
846 port@1 {
847 reg = <1>;
848 endpoint {
849 remote-endpoint = <&dw_hdmi0_in>;
850 };
851 };
852 port@2 {
853 reg = <2>;
854 endpoint {
855 remote-endpoint = <&dw_hdmi1_in>;
856 };
857 };
858 port@3 {
859 reg = <3>;
860 endpoint {
861 remote-endpoint = <&lvds0_in>;
862 };
863 };
864 };
865 };
866
867...