Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / display / allwinner,sun4i-a10-tcon.yaml
blob: 724d93b9193bc788b180c5306553fd40fd8fb99d [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Timings Controller (TCON)
8
9maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13description: |
14 The TCON acts as a timing controller for RGB, LVDS and TV
15 interfaces.
16
17properties:
18 "#clock-cells":
19 const: 0
20
21 compatible:
22 oneOf:
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
26 - const: allwinner,sun6i-a31s-tcon
27 - const: allwinner,sun7i-a20-tcon
28 - const: allwinner,sun8i-a23-tcon
29 - const: allwinner,sun8i-a33-tcon
30 - const: allwinner,sun8i-a83t-tcon-lcd
31 - const: allwinner,sun8i-a83t-tcon-tv
32 - const: allwinner,sun8i-r40-tcon-tv
33 - const: allwinner,sun8i-v3s-tcon
34 - const: allwinner,sun9i-a80-tcon-lcd
35 - const: allwinner,sun9i-a80-tcon-tv
36 - const: allwinner,sun20i-d1-tcon-lcd
37 - const: allwinner,sun20i-d1-tcon-tv
38
39 - items:
40 - enum:
41 - allwinner,sun7i-a20-tcon0
42 - allwinner,sun7i-a20-tcon1
43 - const: allwinner,sun7i-a20-tcon
44
45 - items:
46 - enum:
47 - allwinner,sun50i-a64-tcon-lcd
48 - const: allwinner,sun8i-a83t-tcon-lcd
49
50 - items:
51 - enum:
52 - allwinner,sun8i-h3-tcon-tv
53 - allwinner,sun50i-a64-tcon-tv
54 - const: allwinner,sun8i-a83t-tcon-tv
55
56 - items:
57 - enum:
58 - allwinner,sun50i-h6-tcon-tv
59 - const: allwinner,sun8i-r40-tcon-tv
60
61 reg:
62 maxItems: 1
63
64 interrupts:
65 maxItems: 1
66
67 clocks:
68 minItems: 1
69 maxItems: 4
70
71 clock-names:
72 minItems: 1
73 maxItems: 4
74
75 clock-output-names:
76 description:
77 Name of the LCD pixel clock created.
78 maxItems: 1
79
80 dmas:
81 maxItems: 1
82
83 resets:
84 anyOf:
85 - items:
86 - description: TCON Reset Line
87
88 - items:
89 - description: TCON Reset Line
90 - description: TCON LVDS Reset Line
91
92 - items:
93 - description: TCON Reset Line
94 - description: TCON eDP Reset Line
95
96 - items:
97 - description: TCON Reset Line
98 - description: TCON eDP Reset Line
99 - description: TCON LVDS Reset Line
100
101 reset-names:
102 oneOf:
103 - const: lcd
104
105 - items:
106 - const: lcd
107 - const: lvds
108
109 - items:
110 - const: lcd
111 - const: edp
112
113 - items:
114 - const: lcd
115 - const: edp
116 - const: lvds
117
118 ports:
119 $ref: /schemas/graph.yaml#/properties/ports
120
121 properties:
122 port@0:
123 $ref: /schemas/graph.yaml#/properties/port
124 description: |
125 Input endpoints of the controller.
126
127 port@1:
128 $ref: /schemas/graph.yaml#/$defs/port-base
129 unevaluatedProperties: false
130 description: |
131 Output endpoints of the controller.
132
133 patternProperties:
134 "^endpoint(@[0-9])$":
135 $ref: /schemas/graph.yaml#/$defs/endpoint-base
136 unevaluatedProperties: false
137
138 properties:
139 allwinner,tcon-channel:
140 $ref: /schemas/types.yaml#/definitions/uint32
141 description: |
142 TCON can have 1 or 2 channels, usually with the
143 first channel being used for the panels interfaces
144 (RGB, LVDS, etc.), and the second being used for the
145 outputs that require another controller (TV Encoder,
146 HDMI, etc.).
147
148 If that property is present, specifies the TCON
149 channel the endpoint is associated to. If that
150 property is not present, the endpoint number will be
151 used as the channel number.
152
153 required:
154 - port@0
155 - port@1
156
157required:
158 - compatible
159 - reg
160 - interrupts
161 - clocks
162 - clock-names
163 - resets
164 - ports
165
166additionalProperties: false
167
168allOf:
169 - if:
170 properties:
171 compatible:
172 contains:
173 enum:
174 - allwinner,sun4i-a10-tcon
175 - allwinner,sun5i-a13-tcon
176 - allwinner,sun7i-a20-tcon
177
178 then:
179 properties:
180 clocks:
181 minItems: 3
182
183 clock-names:
184 items:
185 - const: ahb
186 - const: tcon-ch0
187 - const: tcon-ch1
188
189 - if:
190 properties:
191 compatible:
192 contains:
193 enum:
194 - allwinner,sun6i-a31-tcon
195 - allwinner,sun6i-a31s-tcon
196
197 then:
198 properties:
199 clocks:
200 minItems: 4
201
202 clock-names:
203 items:
204 - const: ahb
205 - const: tcon-ch0
206 - const: tcon-ch1
207 - const: lvds-alt
208
209 - if:
210 properties:
211 compatible:
212 contains:
213 enum:
214 - allwinner,sun8i-a23-tcon
215 - allwinner,sun8i-a33-tcon
216
217 then:
218 properties:
219 clocks:
220 minItems: 3
221
222 clock-names:
223 items:
224 - const: ahb
225 - const: tcon-ch0
226 - const: lvds-alt
227
228 - if:
229 properties:
230 compatible:
231 contains:
232 enum:
233 - allwinner,sun8i-a83t-tcon-lcd
234 - allwinner,sun8i-v3s-tcon
235 - allwinner,sun9i-a80-tcon-lcd
236 - allwinner,sun20i-d1-tcon-lcd
237
238 then:
239 properties:
240 clocks:
241 minItems: 2
242
243 clock-names:
244 items:
245 - const: ahb
246 - const: tcon-ch0
247
248 - if:
249 properties:
250 compatible:
251 contains:
252 enum:
253 - allwinner,sun8i-a83t-tcon-tv
254 - allwinner,sun8i-r40-tcon-tv
255 - allwinner,sun9i-a80-tcon-tv
256 - allwinner,sun20i-d1-tcon-tv
257
258 then:
259 properties:
260 clocks:
261 minItems: 2
262
263 clock-names:
264 items:
265 - const: ahb
266 - const: tcon-ch1
267
268 - if:
269 properties:
270 compatible:
271 contains:
272 enum:
273 - allwinner,sun5i-a13-tcon
274 - allwinner,sun6i-a31-tcon
275 - allwinner,sun6i-a31s-tcon
276 - allwinner,sun7i-a20-tcon
277 - allwinner,sun8i-a23-tcon
278 - allwinner,sun8i-a33-tcon
279 - allwinner,sun8i-v3s-tcon
280 - allwinner,sun9i-a80-tcon-lcd
281 - allwinner,sun4i-a10-tcon
282 - allwinner,sun8i-a83t-tcon-lcd
283 - allwinner,sun20i-d1-tcon-lcd
284
285 then:
286 required:
287 - "#clock-cells"
288 - clock-output-names
289
290 - if:
291 properties:
292 compatible:
293 contains:
294 enum:
295 - allwinner,sun6i-a31-tcon
296 - allwinner,sun6i-a31s-tcon
297 - allwinner,sun8i-a23-tcon
298 - allwinner,sun8i-a33-tcon
299 - allwinner,sun8i-a83t-tcon-lcd
300 - allwinner,sun20i-d1-tcon-lcd
301
302 then:
303 properties:
304 resets:
305 minItems: 2
306
307 reset-names:
308 items:
309 - const: lcd
310 - const: lvds
311
312 - if:
313 properties:
314 compatible:
315 contains:
316 enum:
317 - allwinner,sun9i-a80-tcon-lcd
318
319 then:
320 properties:
321 resets:
322 minItems: 3
323
324 reset-names:
325 items:
326 - const: lcd
327 - const: edp
328 - const: lvds
329
330 - if:
331 properties:
332 compatible:
333 contains:
334 enum:
335 - allwinner,sun9i-a80-tcon-tv
336
337 then:
338 properties:
339 resets:
340 minItems: 2
341
342 reset-names:
343 items:
344 - const: lcd
345 - const: edp
346
347 - if:
348 properties:
349 compatible:
350 contains:
351 enum:
352 - allwinner,sun4i-a10-tcon
353 - allwinner,sun5i-a13-tcon
354 - allwinner,sun6i-a31-tcon
355 - allwinner,sun6i-a31s-tcon
356 - allwinner,sun7i-a20-tcon
357 - allwinner,sun8i-a23-tcon
358 - allwinner,sun8i-a33-tcon
359
360 then:
361 required:
362 - dmas
363
364examples:
365 - |
366 #include <dt-bindings/dma/sun4i-a10.h>
367
368 /*
369 * This comes from the clock/sun4i-a10-ccu.h and
370 * reset/sun4i-a10-ccu.h headers, but we can't include them since
371 * it would trigger a bunch of warnings for redefinitions of
372 * symbols with the other example.
373 */
374
375 #define CLK_AHB_LCD0 56
376 #define CLK_TCON0_CH0 149
377 #define CLK_TCON0_CH1 155
378 #define RST_TCON0 11
379
380 lcd-controller@1c0c000 {
381 compatible = "allwinner,sun4i-a10-tcon";
382 reg = <0x01c0c000 0x1000>;
383 interrupts = <44>;
384 resets = <&ccu RST_TCON0>;
385 reset-names = "lcd";
386 clocks = <&ccu CLK_AHB_LCD0>,
387 <&ccu CLK_TCON0_CH0>,
388 <&ccu CLK_TCON0_CH1>;
389 clock-names = "ahb",
390 "tcon-ch0",
391 "tcon-ch1";
392 clock-output-names = "tcon0-pixel-clock";
393 #clock-cells = <0>;
394 dmas = <&dma SUN4I_DMA_DEDICATED 14>;
395
396 ports {
397 #address-cells = <1>;
398 #size-cells = <0>;
399
400 port@0 {
401 #address-cells = <1>;
402 #size-cells = <0>;
403 reg = <0>;
404
405 endpoint@0 {
406 reg = <0>;
407 remote-endpoint = <&be0_out_tcon0>;
408 };
409
410 endpoint@1 {
411 reg = <1>;
412 remote-endpoint = <&be1_out_tcon0>;
413 };
414 };
415
416 port@1 {
417 #address-cells = <1>;
418 #size-cells = <0>;
419 reg = <1>;
420
421 endpoint@1 {
422 reg = <1>;
423 remote-endpoint = <&hdmi_in_tcon0>;
424 allwinner,tcon-channel = <1>;
425 };
426 };
427 };
428 };
429
430 #undef CLK_AHB_LCD0
431 #undef CLK_TCON0_CH0
432 #undef CLK_TCON0_CH1
433 #undef RST_TCON0
434
435 - |
436 #include <dt-bindings/interrupt-controller/arm-gic.h>
437
438 /*
439 * This comes from the clock/sun6i-a31-ccu.h and
440 * reset/sun6i-a31-ccu.h headers, but we can't include them since
441 * it would trigger a bunch of warnings for redefinitions of
442 * symbols with the other example.
443 */
444
445 #define CLK_PLL_MIPI 15
446 #define CLK_AHB1_LCD0 47
447 #define CLK_LCD0_CH0 127
448 #define CLK_LCD0_CH1 129
449 #define RST_AHB1_LCD0 27
450 #define RST_AHB1_LVDS 41
451
452 lcd-controller@1c0c000 {
453 compatible = "allwinner,sun6i-a31-tcon";
454 reg = <0x01c0c000 0x1000>;
455 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
456 dmas = <&dma 11>;
457 resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
458 reset-names = "lcd", "lvds";
459 clocks = <&ccu CLK_AHB1_LCD0>,
460 <&ccu CLK_LCD0_CH0>,
461 <&ccu CLK_LCD0_CH1>,
462 <&ccu CLK_PLL_MIPI>;
463 clock-names = "ahb",
464 "tcon-ch0",
465 "tcon-ch1",
466 "lvds-alt";
467 clock-output-names = "tcon0-pixel-clock";
468 #clock-cells = <0>;
469
470 ports {
471 #address-cells = <1>;
472 #size-cells = <0>;
473
474 port@0 {
475 #address-cells = <1>;
476 #size-cells = <0>;
477 reg = <0>;
478
479 endpoint@0 {
480 reg = <0>;
481 remote-endpoint = <&drc0_out_tcon0>;
482 };
483
484 endpoint@1 {
485 reg = <1>;
486 remote-endpoint = <&drc1_out_tcon0>;
487 };
488 };
489
490 port@1 {
491 #address-cells = <1>;
492 #size-cells = <0>;
493 reg = <1>;
494
495 endpoint@1 {
496 reg = <1>;
497 remote-endpoint = <&hdmi_in_tcon0>;
498 allwinner,tcon-channel = <1>;
499 };
500 };
501 };
502 };
503
504 #undef CLK_PLL_MIPI
505 #undef CLK_AHB1_LCD0
506 #undef CLK_LCD0_CH0
507 #undef CLK_LCD0_CH1
508 #undef RST_AHB1_LCD0
509 #undef RST_AHB1_LVDS
510
511 - |
512 #include <dt-bindings/interrupt-controller/arm-gic.h>
513
514 /*
515 * This comes from the clock/sun9i-a80-ccu.h and
516 * reset/sun9i-a80-ccu.h headers, but we can't include them since
517 * it would trigger a bunch of warnings for redefinitions of
518 * symbols with the other example.
519 */
520
521 #define CLK_BUS_LCD0 102
522 #define CLK_LCD0 58
523 #define RST_BUS_LCD0 22
524 #define RST_BUS_EDP 24
525 #define RST_BUS_LVDS 25
526
527 lcd-controller@3c00000 {
528 compatible = "allwinner,sun9i-a80-tcon-lcd";
529 reg = <0x03c00000 0x10000>;
530 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
531 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
532 clock-names = "ahb", "tcon-ch0";
533 resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
534 reset-names = "lcd", "edp", "lvds";
535 clock-output-names = "tcon0-pixel-clock";
536 #clock-cells = <0>;
537
538 ports {
539 #address-cells = <1>;
540 #size-cells = <0>;
541
542 port@0 {
543 reg = <0>;
544
545 endpoint {
546 remote-endpoint = <&drc0_out_tcon0>;
547 };
548 };
549
550 port@1 {
551 reg = <1>;
552 };
553 };
554 };
555
556 #undef CLK_BUS_TCON0
557 #undef CLK_TCON0
558 #undef RST_BUS_TCON0
559 #undef RST_BUS_EDP
560 #undef RST_BUS_LVDS
561
562 - |
563 #include <dt-bindings/interrupt-controller/arm-gic.h>
564
565 /*
566 * This comes from the clock/sun8i-a83t-ccu.h and
567 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
568 * it would trigger a bunch of warnings for redefinitions of
569 * symbols with the other example.
570 */
571
572 #define CLK_BUS_TCON0 36
573 #define CLK_TCON0 85
574 #define RST_BUS_TCON0 22
575 #define RST_BUS_LVDS 31
576
577 lcd-controller@1c0c000 {
578 compatible = "allwinner,sun8i-a83t-tcon-lcd";
579 reg = <0x01c0c000 0x1000>;
580 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
582 clock-names = "ahb", "tcon-ch0";
583 clock-output-names = "tcon-pixel-clock";
584 #clock-cells = <0>;
585 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
586 reset-names = "lcd", "lvds";
587
588 ports {
589 #address-cells = <1>;
590 #size-cells = <0>;
591
592 port@0 {
593 #address-cells = <1>;
594 #size-cells = <0>;
595 reg = <0>;
596
597 endpoint@0 {
598 reg = <0>;
599 remote-endpoint = <&mixer0_out_tcon0>;
600 };
601
602 endpoint@1 {
603 reg = <1>;
604 remote-endpoint = <&mixer1_out_tcon0>;
605 };
606 };
607
608 port@1 {
609 reg = <1>;
610 };
611 };
612 };
613
614 #undef CLK_BUS_TCON0
615 #undef CLK_TCON0
616 #undef RST_BUS_TCON0
617 #undef RST_BUS_LVDS
618
619 - |
620 #include <dt-bindings/interrupt-controller/arm-gic.h>
621
622 /*
623 * This comes from the clock/sun8i-r40-ccu.h and
624 * reset/sun8i-r40-ccu.h headers, but we can't include them since
625 * it would trigger a bunch of warnings for redefinitions of
626 * symbols with the other example.
627 */
628
629 #define CLK_BUS_TCON_TV0 73
630 #define RST_BUS_TCON_TV0 49
631
632 tcon_tv0: lcd-controller@1c73000 {
633 compatible = "allwinner,sun8i-r40-tcon-tv";
634 reg = <0x01c73000 0x1000>;
635 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
636 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
637 clock-names = "ahb", "tcon-ch1";
638 resets = <&ccu RST_BUS_TCON_TV0>;
639 reset-names = "lcd";
640
641 ports {
642 #address-cells = <1>;
643 #size-cells = <0>;
644
645 port@0 {
646 #address-cells = <1>;
647 #size-cells = <0>;
648 reg = <0>;
649
650 endpoint@0 {
651 reg = <0>;
652 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
653 };
654
655 endpoint@1 {
656 reg = <1>;
657 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
658 };
659 };
660
661 tcon_tv0_out: port@1 {
662 #address-cells = <1>;
663 #size-cells = <0>;
664 reg = <1>;
665
666 endpoint@1 {
667 reg = <1>;
668 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
669 };
670 };
671 };
672 };
673
674 #undef CLK_BUS_TCON_TV0
675 #undef RST_BUS_TCON_TV0
676
677...