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Tom Rini93743d22024-04-01 09:08:13 -04001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek ethsys controller
8
9description:
10 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
11
12maintainers:
13 - James Liao <jamesjj.liao@mediatek.com>
14
15properties:
16 compatible:
17 oneOf:
18 - items:
19 - enum:
20 - mediatek,mt2701-ethsys
21 - mediatek,mt7622-ethsys
22 - mediatek,mt7629-ethsys
23 - mediatek,mt7981-ethsys
24 - mediatek,mt7986-ethsys
25 - mediatek,mt7988-ethsys
26 - const: syscon
27 - items:
28 - const: mediatek,mt7623-ethsys
29 - const: mediatek,mt2701-ethsys
30 - const: syscon
31
32 reg:
33 maxItems: 1
34
35 "#clock-cells":
36 const: 1
37
38 "#reset-cells":
39 const: 1
40
41required:
42 - reg
43 - "#clock-cells"
44 - "#reset-cells"
45
46additionalProperties: false
47
48examples:
49 - |
50 clock-controller@1b000000 {
51 compatible = "mediatek,mt2701-ethsys", "syscon";
52 reg = <0x1b000000 0x1000>;
53 #clock-cells = <1>;
54 #reset-cells = <1>;
55 };