Blame - drivers/crypto/fsl/Kconfig - filogic/uboot

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Ruchika Gupta	29c1a6b	2015-01-23 16:01:55 +0530	[diff] [blame]	1	config FSL_CAAM
				2	bool "Freescale Crypto Driver Support"
Tom Rini	5bdd919	2017-05-15 12:17:49 -0400	[diff] [blame]	3	select SHA_HW_ACCEL
Alexandru Gagniuc	650b786	2021-09-02 19:54:21 -0500	[diff] [blame]	4	# hw_sha1() under drivers/crypto, and needed with SHA_HW_ACCEL
Gaurav Jain	e31dab8	2022-03-24 11:50:25 +0530	[diff] [blame]	5	select MISC if DM
Alexandru Gagniuc	650b786	2021-09-02 19:54:21 -0500	[diff] [blame]	6	imply SPL_CRYPTO if (ARM && SPL)
Simon Glass	027608e	2017-05-17 03:25:25 -0600	[diff] [blame]	7	imply CMD_HASH
Ruchika Gupta	29c1a6b	2015-01-23 16:01:55 +0530	[diff] [blame]	8	help
				9	Enables the Freescale's Cryptographic Accelerator and Assurance
				10	Module (CAAM), also known as the SEC version 4 (SEC4). The driver uses
				11	Job Ring as interface to communicate with CAAM.
York Sun	92c36e2	2016-12-28 08:43:30 -0800	[diff] [blame]	12
Tom Rini	a01b009	2022-07-31 21:08:26 -0400	[diff] [blame]	13	config SYS_FSL_MAX_NUM_OF_SEC
				14	int "Number of job rings in the CAAM"
				15	depends on FSL_CAAM
				16	default 1
				17
Ye Li	3c3e9a1	2021-03-25 17:30:36 +0800	[diff] [blame]	18	config CAAM_64BIT
				19	bool
Gaurav Jain	db4dd6a	2022-03-24 11:50:33 +0530	[diff] [blame]	20	default y if PHYS_64BIT && !ARCH_IMX8M && !ARCH_IMX8
Ye Li	3c3e9a1	2021-03-25 17:30:36 +0800	[diff] [blame]	21	help
				22	Select Crypto driver for 64 bits CAAM version
				23
York Sun	92c36e2	2016-12-28 08:43:30 -0800	[diff] [blame]	24	config SYS_FSL_HAS_SEC
				25	bool
				26	help
				27	Enable Freescale Secure Boot and Trusted Architecture
				28
				29	config SYS_FSL_SEC_COMPAT_2
				30	bool
				31	help
				32	Secure boot and trust architecture compatible version 2
				33
				34	config SYS_FSL_SEC_COMPAT_4
				35	bool
				36	help
				37	Secure boot and trust architecture compatible version 4
				38
				39	config SYS_FSL_SEC_COMPAT_5
				40	bool
				41	help
				42	Secure boot and trust architecture compatible version 5
				43
				44	config SYS_FSL_SEC_COMPAT_6
				45	bool
				46	help
				47	Secure boot and trust architecture compatible version 6
				48
York Sun	fa419942	2016-12-28 08:43:31 -0800	[diff] [blame]	49	config SYS_FSL_SEC_BE
				50	bool "Big-endian access to Freescale Secure Boot"
				51
York Sun	92c36e2	2016-12-28 08:43:30 -0800	[diff] [blame]	52	config SYS_FSL_SEC_COMPAT
				53	int "Freescale Secure Boot compatibility"
				54	depends on SYS_FSL_HAS_SEC
				55	default 2 if SYS_FSL_SEC_COMPAT_2
				56	default 4 if SYS_FSL_SEC_COMPAT_4
				57	default 5 if SYS_FSL_SEC_COMPAT_5
				58	default 6 if SYS_FSL_SEC_COMPAT_6
York Sun	fa419942	2016-12-28 08:43:31 -0800	[diff] [blame]	59
				60	config SYS_FSL_SEC_LE
				61	bool "Little-endian access to Freescale Secure Boot"
Michael Walle	b258eb2	2020-06-27 22:58:53 +0200	[diff] [blame]	62
				63	if FSL_CAAM
				64
Emanuele Ghidoli	04a0402	2024-03-28 11:30:12 +0100	[diff] [blame]	65	config FSL_CAAM_JR_NTZ_ACCESS
				66	bool "Give CAAM Job Ring access to non-secure world"
				67	help
				68	It is needed when OP-TEE is not used and Freescale CAAM Job Ring linux
				69	driver is used.
				70
Michael Walle	b258eb2	2020-06-27 22:58:53 +0200	[diff] [blame]	71	config FSL_CAAM_RNG
Marek Vasut	7a0a237	2024-04-26 01:02:09 +0200	[diff] [blame]	72	bool "Enable CAAM Random Number Generator support"
Michael Walle	b258eb2	2020-06-27 22:58:53 +0200	[diff] [blame]	73	depends on DM_RNG
				74	default y
				75	help
				76	Enable support for the hardware based random number generator
				77	module of the CAAM. The random data is fetched from the DRGB
				78	using the prediction resistance flag which means the DRGB is
				79	reseeded from the TRNG every time random data is generated.
				80
Marek Vasut	00dac70	2024-04-26 01:02:08 +0200	[diff] [blame]	81	config SPL_FSL_CAAM_RNG
				82	bool "Enable CAAM Random Number Generator support in SPL"
				83	depends on SPL_DM_RNG
				84	help
				85	This option is an SPL-variant of the FSL_CAAM_RNG option.
				86	See the help of FSL_CAAM_RNG for details.
				87
Michael Walle	b258eb2	2020-06-27 22:58:53 +0200	[diff] [blame]	88	endif
Kshitiz Varshney	8428a49	2022-12-22 09:50:27 +0100	[diff] [blame]	89
				90	config FSL_DCP_RNG
Marek Vasut	7a0a237	2024-04-26 01:02:09 +0200	[diff] [blame]	91	bool "Enable DCP Random Number Generator support"
Kshitiz Varshney	8428a49	2022-12-22 09:50:27 +0100	[diff] [blame]	92	depends on DM_RNG
Kshitiz Varshney	8428a49	2022-12-22 09:50:27 +0100	[diff] [blame]	93	help
				94	Enable support for the hardware based random number generator
				95	module of the DCP. It uses the True Random Number Generator (TRNG)
				96	and a Pseudo-Random Number Generator (PRNG) to achieve a true
				97	randomness and cryptographic strength.