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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Chris Zankel1387dab2016-08-10 18:36:44 +03002/*
3 * (C) Copyright 2008 - 2013 Tensilica Inc.
Chris Zankel1387dab2016-08-10 18:36:44 +03004 */
5
Tom Rini8c70baa2021-12-14 13:36:40 -05006#include <clock_legacy.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07007#include <time.h>
Chris Zankel1387dab2016-08-10 18:36:44 +03008#include <asm/global_data.h>
Simon Glassdbd79542020-05-10 11:40:11 -06009#include <linux/delay.h>
Chris Zankel1387dab2016-08-10 18:36:44 +030010#include <linux/stringify.h>
11
12DECLARE_GLOBAL_DATA_PTR;
13
14#if XCHAL_HAVE_CCOUNT
15static ulong get_ccount(void)
16{
17 ulong ccount;
18 asm volatile ("rsr %0,"__stringify(CCOUNT) : "=a" (ccount));
19 return ccount;
20}
21#else
22static ulong fake_ccount;
23#define get_ccount() fake_ccount
24#endif
25
26static void delay_cycles(unsigned cycles)
27{
28#if XCHAL_HAVE_CCOUNT
29 unsigned expiry = get_ccount() + cycles;
30 while ((signed)(expiry - get_ccount()) > 0)
31 ;
32#else
33#warning "Without Xtensa timer option, timing will not be accurate."
34
35 /*
36 * Approximate the cycle count by a loop iteration count.
37 * This is highly dependent on config and optimization.
38 */
39
40 volatile unsigned i;
41 for (i = cycles >> 4U; i > 0; --i)
42 ;
43 fake_ccount += cycles;
44#endif
45}
46
47/*
48 * Delay (busy-wait) for a number of microseconds.
49 */
50
51void __udelay(unsigned long usec)
52{
53 ulong lo, hi, i;
Tom Rini8c70baa2021-12-14 13:36:40 -050054 ulong mhz = get_board_sys_clk() / 1000000;
Chris Zankel1387dab2016-08-10 18:36:44 +030055
56 /* Scale to support full 32-bit usec range */
57
58 lo = usec & ((1<<22)-1);
59 hi = usec >> 22UL;
60 for (i = 0; i < hi; ++i)
61 delay_cycles(mhz << 22);
62 delay_cycles(mhz * lo);
63}
64
65
66/*
67 * Return the elapsed time (ticks) since 'base'.
68 */
69
70ulong get_timer(ulong base)
71{
72 /* Don't tie up a timer; use cycle counter if available (or fake it) */
73
74#if XCHAL_HAVE_CCOUNT
75 register ulong ccount;
76 __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount));
Tom Rini8c70baa2021-12-14 13:36:40 -050077 return ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base;
Chris Zankel1387dab2016-08-10 18:36:44 +030078#else
79 /*
80 * Add at least the overhead of this call (in cycles).
81 * Avoids hanging in case caller doesn't use udelay().
82 * Note that functions that don't call udelay() (such as
83 * the "sleep" command) will not get a significant delay
84 * because there is no time reference.
85 */
86
87 fake_ccount += 20;
Tom Rini8c70baa2021-12-14 13:36:40 -050088 return fake_ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base;
Chris Zankel1387dab2016-08-10 18:36:44 +030089#endif
90}
91
92
93/*
94 * This function is derived from ARM/PowerPC code (read timebase as long long).
95 * On Xtensa it just returns the timer value.
96 */
97unsigned long long get_ticks(void)
98{
99 return get_timer(0);
100}
101
102/*
103 * This function is derived from ARM/PowerPC code (timebase clock frequency).
104 * On Xtensa it returns the number of timer ticks per second.
105 */
106ulong get_tbclk(void)
107{
Masahiro Yamada04cfea52016-09-06 22:17:38 +0900108 return CONFIG_SYS_HZ;
Chris Zankel1387dab2016-08-10 18:36:44 +0300109}
110
111#if XCHAL_HAVE_CCOUNT
112unsigned long timer_get_us(void)
113{
114 unsigned long ccount;
115
116 __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount));
Tom Rini8c70baa2021-12-14 13:36:40 -0500117 return ccount / (get_board_sys_clk() / 1000000);
Chris Zankel1387dab2016-08-10 18:36:44 +0300118}
119#endif