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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk7eaacc52003-08-29 22:00:43 +00002/*
3 * (C) Copyright 2002
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5 * Marius Groeger <mgroeger@sysgo.de>
6 *
7 * (C) Copyright 2002
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +02008 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
wdenk7eaacc52003-08-29 22:00:43 +00009 */
10
11/*
12 * CPU specific code
13 */
14
wdenk7eaacc52003-08-29 22:00:43 +000015#include <command.h>
Simon Glass1d91ba72019-11-14 12:57:37 -070016#include <cpu_func.h>
Simon Glass8f3f7612019-11-14 12:57:42 -070017#include <irq_func.h>
Simon Glass274e0b02020-05-10 11:39:56 -060018#include <asm/cache.h>
Jean-Christophe PLAGNIOL-VILLARD9053b5a2009-04-05 13:02:43 +020019#include <asm/system.h>
wdenk7eaacc52003-08-29 22:00:43 +000020
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020021static void cache_flush(void);
wdenk7eaacc52003-08-29 22:00:43 +000022
Icenowy Zhengb198c2e2022-01-29 10:23:02 -050023/************************************************************
24 * sdelay() - simple spin loop. Will be constant time as
25 * its generally used in bypass conditions only. This
26 * is necessary until timers are accessible.
27 *
28 * not inline to increase chances its in cache when called
29 *************************************************************/
30void sdelay(unsigned long loops)
31{
32 __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
33 "bne 1b":"=r" (loops):"0"(loops));
34}
35
wdenk7eaacc52003-08-29 22:00:43 +000036int cleanup_before_linux (void)
37{
38 /*
39 * this function is called just before we call linux
40 * it prepares the processor for linux
41 *
42 * we turn off caches etc ...
43 */
44
Simon Glassf87959b2019-11-14 12:57:40 -070045 disable_interrupts();
wdenk7eaacc52003-08-29 22:00:43 +000046
wdenk7eaacc52003-08-29 22:00:43 +000047
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020048 /* turn off I/D-cache */
49 icache_disable();
50 dcache_disable();
Michael Walle5ae3eec2012-02-06 22:42:10 +053051 l2_cache_disable();
52
wdenk7eaacc52003-08-29 22:00:43 +000053 /* flush I/D-cache */
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020054 cache_flush();
Wolfgang Denkadf20a12005-09-25 01:48:28 +020055
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020056 return 0;
wdenk7eaacc52003-08-29 22:00:43 +000057}
58
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020059/* flush I/D-cache */
60static void cache_flush (void)
Hugo Villeneuve82a84372008-07-10 10:46:33 -040061{
Trevor Woerner43ec7e02019-05-03 09:41:00 -040062#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020063 unsigned long i = 0;
Hugo Villeneuve82a84372008-07-10 10:46:33 -040064
Jean-Christophe PLAGNIOL-VILLARDe6b5f1b2009-04-05 13:06:31 +020065 asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
Heiko Schocherb642d832014-11-18 09:41:56 +010066#endif
wdenk7eaacc52003-08-29 22:00:43 +000067}