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Marek Vasut06485cf2018-04-08 15:22:58 +02001/*
2 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <clk.h>
9#include <fdtdec.h>
10#include <mmc.h>
11#include <dm.h>
12#include <linux/compat.h>
13#include <linux/dma-direction.h>
14#include <linux/io.h>
15#include <linux/sizes.h>
16#include <power/regulator.h>
17#include <asm/unaligned.h>
18
Marek Vasutfd83e762018-04-13 23:51:33 +020019#include "tmio-common.h"
Marek Vasut06485cf2018-04-08 15:22:58 +020020
Marek Vasute0781e42018-04-08 19:09:17 +020021#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
22
23/* SCC registers */
24#define RENESAS_SDHI_SCC_DTCNTL 0x800
25#define RENESAS_SDHI_SCC_DTCNTL_TAPEN BIT(0)
26#define RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT 16
27#define RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK 0xff
28#define RENESAS_SDHI_SCC_TAPSET 0x804
29#define RENESAS_SDHI_SCC_DT2FF 0x808
30#define RENESAS_SDHI_SCC_CKSEL 0x80c
31#define RENESAS_SDHI_SCC_CKSEL_DTSEL BIT(0)
32#define RENESAS_SDHI_SCC_RVSCNTL 0x810
33#define RENESAS_SDHI_SCC_RVSCNTL_RVSEN BIT(0)
34#define RENESAS_SDHI_SCC_RVSREQ 0x814
35#define RENESAS_SDHI_SCC_RVSREQ_RVSERR BIT(2)
36#define RENESAS_SDHI_SCC_SMPCMP 0x818
37#define RENESAS_SDHI_SCC_TMPPORT2 0x81c
38
39#define RENESAS_SDHI_MAX_TAP 3
40
Marek Vasutfd83e762018-04-13 23:51:33 +020041static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv)
Marek Vasute0781e42018-04-08 19:09:17 +020042{
43 u32 reg;
44
45 /* Initialize SCC */
Marek Vasutfd83e762018-04-13 23:51:33 +020046 tmio_sd_writel(priv, 0, TMIO_SD_INFO1);
Marek Vasute0781e42018-04-08 19:09:17 +020047
Marek Vasutfd83e762018-04-13 23:51:33 +020048 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
49 reg &= ~TMIO_SD_CLKCTL_SCLKEN;
50 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
Marek Vasute0781e42018-04-08 19:09:17 +020051
52 /* Set sampling clock selection range */
Marek Vasutfd83e762018-04-13 23:51:33 +020053 tmio_sd_writel(priv, 0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT,
Marek Vasute0781e42018-04-08 19:09:17 +020054 RENESAS_SDHI_SCC_DTCNTL);
55
Marek Vasutfd83e762018-04-13 23:51:33 +020056 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +020057 reg |= RENESAS_SDHI_SCC_DTCNTL_TAPEN;
Marek Vasutfd83e762018-04-13 23:51:33 +020058 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_DTCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +020059
Marek Vasutfd83e762018-04-13 23:51:33 +020060 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL);
Marek Vasute0781e42018-04-08 19:09:17 +020061 reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL;
Marek Vasutfd83e762018-04-13 23:51:33 +020062 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL);
Marek Vasute0781e42018-04-08 19:09:17 +020063
Marek Vasutfd83e762018-04-13 23:51:33 +020064 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +020065 reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN;
Marek Vasutfd83e762018-04-13 23:51:33 +020066 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +020067
Marek Vasutfd83e762018-04-13 23:51:33 +020068 tmio_sd_writel(priv, 0x300 /* scc_tappos */,
Marek Vasute0781e42018-04-08 19:09:17 +020069 RENESAS_SDHI_SCC_DT2FF);
70
Marek Vasutfd83e762018-04-13 23:51:33 +020071 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
72 reg |= TMIO_SD_CLKCTL_SCLKEN;
73 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
Marek Vasute0781e42018-04-08 19:09:17 +020074
75 /* Read TAPNUM */
Marek Vasutfd83e762018-04-13 23:51:33 +020076 return (tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL) >>
Marek Vasute0781e42018-04-08 19:09:17 +020077 RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) &
78 RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK;
79}
80
Marek Vasutfd83e762018-04-13 23:51:33 +020081static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv)
Marek Vasute0781e42018-04-08 19:09:17 +020082{
83 u32 reg;
84
85 /* Reset SCC */
Marek Vasutfd83e762018-04-13 23:51:33 +020086 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
87 reg &= ~TMIO_SD_CLKCTL_SCLKEN;
88 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
Marek Vasute0781e42018-04-08 19:09:17 +020089
Marek Vasutfd83e762018-04-13 23:51:33 +020090 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL);
Marek Vasute0781e42018-04-08 19:09:17 +020091 reg &= ~RENESAS_SDHI_SCC_CKSEL_DTSEL;
Marek Vasutfd83e762018-04-13 23:51:33 +020092 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL);
Marek Vasute0781e42018-04-08 19:09:17 +020093
Marek Vasutfd83e762018-04-13 23:51:33 +020094 reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
95 reg |= TMIO_SD_CLKCTL_SCLKEN;
96 tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
Marek Vasute0781e42018-04-08 19:09:17 +020097
Marek Vasutfd83e762018-04-13 23:51:33 +020098 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +020099 reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN;
Marek Vasutfd83e762018-04-13 23:51:33 +0200100 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +0200101
Marek Vasutfd83e762018-04-13 23:51:33 +0200102 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +0200103 reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN;
Marek Vasutfd83e762018-04-13 23:51:33 +0200104 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +0200105}
106
Marek Vasutfd83e762018-04-13 23:51:33 +0200107static void renesas_sdhi_prepare_tuning(struct tmio_sd_priv *priv,
Marek Vasute0781e42018-04-08 19:09:17 +0200108 unsigned long tap)
109{
110 /* Set sampling clock position */
Marek Vasutfd83e762018-04-13 23:51:33 +0200111 tmio_sd_writel(priv, tap, RENESAS_SDHI_SCC_TAPSET);
Marek Vasute0781e42018-04-08 19:09:17 +0200112}
113
Marek Vasutfd83e762018-04-13 23:51:33 +0200114static unsigned int renesas_sdhi_compare_scc_data(struct tmio_sd_priv *priv)
Marek Vasute0781e42018-04-08 19:09:17 +0200115{
116 /* Get comparison of sampling data */
Marek Vasutfd83e762018-04-13 23:51:33 +0200117 return tmio_sd_readl(priv, RENESAS_SDHI_SCC_SMPCMP);
Marek Vasute0781e42018-04-08 19:09:17 +0200118}
119
Marek Vasutfd83e762018-04-13 23:51:33 +0200120static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv,
Marek Vasute0781e42018-04-08 19:09:17 +0200121 unsigned int tap_num, unsigned int taps,
122 unsigned int smpcmp)
123{
124 unsigned long tap_cnt; /* counter of tuning success */
125 unsigned long tap_set; /* tap position */
126 unsigned long tap_start;/* start position of tuning success */
127 unsigned long tap_end; /* end position of tuning success */
128 unsigned long ntap; /* temporary counter of tuning success */
129 unsigned long match_cnt;/* counter of matching data */
130 unsigned long i;
131 bool select = false;
132 u32 reg;
133
134 /* Clear SCC_RVSREQ */
Marek Vasutfd83e762018-04-13 23:51:33 +0200135 tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ);
Marek Vasute0781e42018-04-08 19:09:17 +0200136
137 /* Merge the results */
138 for (i = 0; i < tap_num * 2; i++) {
139 if (!(taps & BIT(i))) {
140 taps &= ~BIT(i % tap_num);
141 taps &= ~BIT((i % tap_num) + tap_num);
142 }
143 if (!(smpcmp & BIT(i))) {
144 smpcmp &= ~BIT(i % tap_num);
145 smpcmp &= ~BIT((i % tap_num) + tap_num);
146 }
147 }
148
149 /*
150 * Find the longest consecutive run of successful probes. If that
151 * is more than RENESAS_SDHI_MAX_TAP probes long then use the
152 * center index as the tap.
153 */
154 tap_cnt = 0;
155 ntap = 0;
156 tap_start = 0;
157 tap_end = 0;
158 for (i = 0; i < tap_num * 2; i++) {
159 if (taps & BIT(i))
160 ntap++;
161 else {
162 if (ntap > tap_cnt) {
163 tap_start = i - ntap;
164 tap_end = i - 1;
165 tap_cnt = ntap;
166 }
167 ntap = 0;
168 }
169 }
170
171 if (ntap > tap_cnt) {
172 tap_start = i - ntap;
173 tap_end = i - 1;
174 tap_cnt = ntap;
175 }
176
177 /*
178 * If all of the TAP is OK, the sampling clock position is selected by
179 * identifying the change point of data.
180 */
181 if (tap_cnt == tap_num * 2) {
182 match_cnt = 0;
183 ntap = 0;
184 tap_start = 0;
185 tap_end = 0;
186 for (i = 0; i < tap_num * 2; i++) {
187 if (smpcmp & BIT(i))
188 ntap++;
189 else {
190 if (ntap > match_cnt) {
191 tap_start = i - ntap;
192 tap_end = i - 1;
193 match_cnt = ntap;
194 }
195 ntap = 0;
196 }
197 }
198 if (ntap > match_cnt) {
199 tap_start = i - ntap;
200 tap_end = i - 1;
201 match_cnt = ntap;
202 }
203 if (match_cnt)
204 select = true;
205 } else if (tap_cnt >= RENESAS_SDHI_MAX_TAP)
206 select = true;
207
208 if (select)
209 tap_set = ((tap_start + tap_end) / 2) % tap_num;
210 else
211 return -EIO;
212
213 /* Set SCC */
Marek Vasutfd83e762018-04-13 23:51:33 +0200214 tmio_sd_writel(priv, tap_set, RENESAS_SDHI_SCC_TAPSET);
Marek Vasute0781e42018-04-08 19:09:17 +0200215
216 /* Enable auto re-tuning */
Marek Vasutfd83e762018-04-13 23:51:33 +0200217 reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +0200218 reg |= RENESAS_SDHI_SCC_RVSCNTL_RVSEN;
Marek Vasutfd83e762018-04-13 23:51:33 +0200219 tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL);
Marek Vasute0781e42018-04-08 19:09:17 +0200220
221 return 0;
222}
223
224int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode)
225{
Marek Vasutfd83e762018-04-13 23:51:33 +0200226 struct tmio_sd_priv *priv = dev_get_priv(dev);
Marek Vasute0781e42018-04-08 19:09:17 +0200227 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
228 struct mmc *mmc = upriv->mmc;
229 unsigned int tap_num;
230 unsigned int taps = 0, smpcmp = 0;
231 int i, ret = 0;
232 u32 caps;
233
234 /* Only supported on Renesas RCar */
Marek Vasutfd83e762018-04-13 23:51:33 +0200235 if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS))
Marek Vasute0781e42018-04-08 19:09:17 +0200236 return -EINVAL;
237
238 /* clock tuning is not needed for upto 52MHz */
239 if (!((mmc->selected_mode == MMC_HS_200) ||
240 (mmc->selected_mode == UHS_SDR104) ||
241 (mmc->selected_mode == UHS_SDR50)))
242 return 0;
243
244 tap_num = renesas_sdhi_init_tuning(priv);
245 if (!tap_num)
246 /* Tuning is not supported */
247 goto out;
248
249 if (tap_num * 2 >= sizeof(taps) * 8) {
250 dev_err(dev,
251 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
252 goto out;
253 }
254
255 /* Issue CMD19 twice for each tap */
256 for (i = 0; i < 2 * tap_num; i++) {
257 renesas_sdhi_prepare_tuning(priv, i % tap_num);
258
259 /* Force PIO for the tuning */
260 caps = priv->caps;
Marek Vasutfd83e762018-04-13 23:51:33 +0200261 priv->caps &= ~TMIO_SD_CAP_DMA_INTERNAL;
Marek Vasute0781e42018-04-08 19:09:17 +0200262
263 ret = mmc_send_tuning(mmc, opcode, NULL);
264
265 priv->caps = caps;
266
267 if (ret == 0)
268 taps |= BIT(i);
269
270 ret = renesas_sdhi_compare_scc_data(priv);
271 if (ret == 0)
272 smpcmp |= BIT(i);
273
274 mdelay(1);
275 }
276
277 ret = renesas_sdhi_select_tuning(priv, tap_num, taps, smpcmp);
278
279out:
280 if (ret < 0) {
281 dev_warn(dev, "Tuning procedure failed\n");
282 renesas_sdhi_reset_tuning(priv);
283 }
284
285 return ret;
286}
287#endif
288
289static int renesas_sdhi_set_ios(struct udevice *dev)
290{
Marek Vasutfd83e762018-04-13 23:51:33 +0200291 int ret = tmio_sd_set_ios(dev);
Marek Vasut33d38182018-04-09 20:47:31 +0200292
293 mdelay(10);
294
Marek Vasute0781e42018-04-08 19:09:17 +0200295#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
Marek Vasutfd83e762018-04-13 23:51:33 +0200296 struct tmio_sd_priv *priv = dev_get_priv(dev);
Marek Vasute0781e42018-04-08 19:09:17 +0200297
298 renesas_sdhi_reset_tuning(priv);
299#endif
300
301 return ret;
302}
303
Marek Vasut06485cf2018-04-08 15:22:58 +0200304static const struct dm_mmc_ops renesas_sdhi_ops = {
Marek Vasutfd83e762018-04-13 23:51:33 +0200305 .send_cmd = tmio_sd_send_cmd,
Marek Vasute0781e42018-04-08 19:09:17 +0200306 .set_ios = renesas_sdhi_set_ios,
Marek Vasutfd83e762018-04-13 23:51:33 +0200307 .get_cd = tmio_sd_get_cd,
Marek Vasute0781e42018-04-08 19:09:17 +0200308#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
309 .execute_tuning = renesas_sdhi_execute_tuning,
310#endif
Marek Vasut06485cf2018-04-08 15:22:58 +0200311};
312
Marek Vasutfd83e762018-04-13 23:51:33 +0200313#define RENESAS_GEN2_QUIRKS TMIO_SD_CAP_RCAR_GEN2
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200314#define RENESAS_GEN3_QUIRKS \
Marek Vasutfd83e762018-04-13 23:51:33 +0200315 TMIO_SD_CAP_64BIT | TMIO_SD_CAP_RCAR_GEN3 | TMIO_SD_CAP_RCAR_UHS
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200316
Marek Vasut06485cf2018-04-08 15:22:58 +0200317static const struct udevice_id renesas_sdhi_match[] = {
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200318 { .compatible = "renesas,sdhi-r8a7790", .data = RENESAS_GEN2_QUIRKS },
319 { .compatible = "renesas,sdhi-r8a7791", .data = RENESAS_GEN2_QUIRKS },
320 { .compatible = "renesas,sdhi-r8a7792", .data = RENESAS_GEN2_QUIRKS },
321 { .compatible = "renesas,sdhi-r8a7793", .data = RENESAS_GEN2_QUIRKS },
322 { .compatible = "renesas,sdhi-r8a7794", .data = RENESAS_GEN2_QUIRKS },
323 { .compatible = "renesas,sdhi-r8a7795", .data = RENESAS_GEN3_QUIRKS },
324 { .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS },
325 { .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS },
326 { .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS },
327 { .compatible = "renesas,sdhi-r8a77995", .data = RENESAS_GEN3_QUIRKS },
Marek Vasut06485cf2018-04-08 15:22:58 +0200328 { /* sentinel */ }
329};
330
Marek Vasutabe3e952018-04-08 17:45:23 +0200331static int renesas_sdhi_probe(struct udevice *dev)
332{
Masahiro Yamada19989d832018-04-20 18:14:24 +0900333 struct tmio_sd_priv *priv = dev_get_priv(dev);
Marek Vasutabe3e952018-04-08 17:45:23 +0200334 u32 quirks = dev_get_driver_data(dev);
Marek Vasut1949d482018-04-08 18:14:22 +0200335 struct fdt_resource reg_res;
Masahiro Yamada19989d832018-04-20 18:14:24 +0900336 struct clk clk;
Marek Vasut1949d482018-04-08 18:14:22 +0200337 DECLARE_GLOBAL_DATA_PTR;
338 int ret;
339
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200340 if (quirks == RENESAS_GEN2_QUIRKS) {
341 ret = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev),
342 "reg", 0, &reg_res);
343 if (ret < 0) {
344 dev_err(dev, "\"reg\" resource not found, ret=%i\n",
345 ret);
346 return ret;
347 }
Marek Vasut1949d482018-04-08 18:14:22 +0200348
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200349 if (fdt_resource_size(&reg_res) == 0x100)
Marek Vasutfd83e762018-04-13 23:51:33 +0200350 quirks |= TMIO_SD_CAP_16BIT;
Marek Vasut9db9e6a2018-04-08 18:49:52 +0200351 }
Marek Vasutabe3e952018-04-08 17:45:23 +0200352
Masahiro Yamada19989d832018-04-20 18:14:24 +0900353 ret = clk_get_by_index(dev, 0, &clk);
354 if (ret < 0) {
355 dev_err(dev, "failed to get host clock\n");
356 return ret;
357 }
358
359 /* set to max rate */
360 priv->mclk = clk_set_rate(&clk, ULONG_MAX);
361 if (IS_ERR_VALUE(priv->mclk)) {
362 dev_err(dev, "failed to set rate for host clock\n");
363 clk_free(&clk);
364 return priv->mclk;
365 }
366
367 ret = clk_enable(&clk);
368 clk_free(&clk);
369 if (ret) {
370 dev_err(dev, "failed to enable host clock\n");
371 return ret;
372 }
373
Marek Vasutfd83e762018-04-13 23:51:33 +0200374 ret = tmio_sd_probe(dev, quirks);
Marek Vasute0781e42018-04-08 19:09:17 +0200375#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
376 if (!ret)
377 renesas_sdhi_reset_tuning(dev_get_priv(dev));
378#endif
379 return ret;
Marek Vasutabe3e952018-04-08 17:45:23 +0200380}
381
Marek Vasut06485cf2018-04-08 15:22:58 +0200382U_BOOT_DRIVER(renesas_sdhi) = {
383 .name = "renesas-sdhi",
384 .id = UCLASS_MMC,
385 .of_match = renesas_sdhi_match,
Marek Vasutfd83e762018-04-13 23:51:33 +0200386 .bind = tmio_sd_bind,
Marek Vasutabe3e952018-04-08 17:45:23 +0200387 .probe = renesas_sdhi_probe,
Marek Vasutfd83e762018-04-13 23:51:33 +0200388 .priv_auto_alloc_size = sizeof(struct tmio_sd_priv),
389 .platdata_auto_alloc_size = sizeof(struct tmio_sd_plat),
Marek Vasut06485cf2018-04-08 15:22:58 +0200390 .ops = &renesas_sdhi_ops,
391};