Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <fdtdec.h> |
| 10 | #include <mmc.h> |
| 11 | #include <dm.h> |
| 12 | #include <linux/compat.h> |
| 13 | #include <linux/dma-direction.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/sizes.h> |
| 16 | #include <power/regulator.h> |
| 17 | #include <asm/unaligned.h> |
| 18 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 19 | #include "tmio-common.h" |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 20 | |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 21 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
| 22 | |
| 23 | /* SCC registers */ |
| 24 | #define RENESAS_SDHI_SCC_DTCNTL 0x800 |
| 25 | #define RENESAS_SDHI_SCC_DTCNTL_TAPEN BIT(0) |
| 26 | #define RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT 16 |
| 27 | #define RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK 0xff |
| 28 | #define RENESAS_SDHI_SCC_TAPSET 0x804 |
| 29 | #define RENESAS_SDHI_SCC_DT2FF 0x808 |
| 30 | #define RENESAS_SDHI_SCC_CKSEL 0x80c |
| 31 | #define RENESAS_SDHI_SCC_CKSEL_DTSEL BIT(0) |
| 32 | #define RENESAS_SDHI_SCC_RVSCNTL 0x810 |
| 33 | #define RENESAS_SDHI_SCC_RVSCNTL_RVSEN BIT(0) |
| 34 | #define RENESAS_SDHI_SCC_RVSREQ 0x814 |
| 35 | #define RENESAS_SDHI_SCC_RVSREQ_RVSERR BIT(2) |
| 36 | #define RENESAS_SDHI_SCC_SMPCMP 0x818 |
| 37 | #define RENESAS_SDHI_SCC_TMPPORT2 0x81c |
| 38 | |
| 39 | #define RENESAS_SDHI_MAX_TAP 3 |
| 40 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 41 | static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 42 | { |
| 43 | u32 reg; |
| 44 | |
| 45 | /* Initialize SCC */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 46 | tmio_sd_writel(priv, 0, TMIO_SD_INFO1); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 47 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 48 | reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); |
| 49 | reg &= ~TMIO_SD_CLKCTL_SCLKEN; |
| 50 | tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 51 | |
| 52 | /* Set sampling clock selection range */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 53 | tmio_sd_writel(priv, 0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 54 | RENESAS_SDHI_SCC_DTCNTL); |
| 55 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 56 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 57 | reg |= RENESAS_SDHI_SCC_DTCNTL_TAPEN; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 58 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_DTCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 59 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 60 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 61 | reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 62 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 63 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 64 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 65 | reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 66 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 67 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 68 | tmio_sd_writel(priv, 0x300 /* scc_tappos */, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 69 | RENESAS_SDHI_SCC_DT2FF); |
| 70 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 71 | reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); |
| 72 | reg |= TMIO_SD_CLKCTL_SCLKEN; |
| 73 | tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 74 | |
| 75 | /* Read TAPNUM */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 76 | return (tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL) >> |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 77 | RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) & |
| 78 | RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK; |
| 79 | } |
| 80 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 81 | static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 82 | { |
| 83 | u32 reg; |
| 84 | |
| 85 | /* Reset SCC */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 86 | reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); |
| 87 | reg &= ~TMIO_SD_CLKCTL_SCLKEN; |
| 88 | tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 89 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 90 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 91 | reg &= ~RENESAS_SDHI_SCC_CKSEL_DTSEL; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 92 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 93 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 94 | reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); |
| 95 | reg |= TMIO_SD_CLKCTL_SCLKEN; |
| 96 | tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 97 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 98 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 99 | reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 100 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 101 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 102 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 103 | reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 104 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 105 | } |
| 106 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 107 | static void renesas_sdhi_prepare_tuning(struct tmio_sd_priv *priv, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 108 | unsigned long tap) |
| 109 | { |
| 110 | /* Set sampling clock position */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 111 | tmio_sd_writel(priv, tap, RENESAS_SDHI_SCC_TAPSET); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 112 | } |
| 113 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 114 | static unsigned int renesas_sdhi_compare_scc_data(struct tmio_sd_priv *priv) |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 115 | { |
| 116 | /* Get comparison of sampling data */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 117 | return tmio_sd_readl(priv, RENESAS_SDHI_SCC_SMPCMP); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 118 | } |
| 119 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 120 | static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 121 | unsigned int tap_num, unsigned int taps, |
| 122 | unsigned int smpcmp) |
| 123 | { |
| 124 | unsigned long tap_cnt; /* counter of tuning success */ |
| 125 | unsigned long tap_set; /* tap position */ |
| 126 | unsigned long tap_start;/* start position of tuning success */ |
| 127 | unsigned long tap_end; /* end position of tuning success */ |
| 128 | unsigned long ntap; /* temporary counter of tuning success */ |
| 129 | unsigned long match_cnt;/* counter of matching data */ |
| 130 | unsigned long i; |
| 131 | bool select = false; |
| 132 | u32 reg; |
| 133 | |
| 134 | /* Clear SCC_RVSREQ */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 135 | tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 136 | |
| 137 | /* Merge the results */ |
| 138 | for (i = 0; i < tap_num * 2; i++) { |
| 139 | if (!(taps & BIT(i))) { |
| 140 | taps &= ~BIT(i % tap_num); |
| 141 | taps &= ~BIT((i % tap_num) + tap_num); |
| 142 | } |
| 143 | if (!(smpcmp & BIT(i))) { |
| 144 | smpcmp &= ~BIT(i % tap_num); |
| 145 | smpcmp &= ~BIT((i % tap_num) + tap_num); |
| 146 | } |
| 147 | } |
| 148 | |
| 149 | /* |
| 150 | * Find the longest consecutive run of successful probes. If that |
| 151 | * is more than RENESAS_SDHI_MAX_TAP probes long then use the |
| 152 | * center index as the tap. |
| 153 | */ |
| 154 | tap_cnt = 0; |
| 155 | ntap = 0; |
| 156 | tap_start = 0; |
| 157 | tap_end = 0; |
| 158 | for (i = 0; i < tap_num * 2; i++) { |
| 159 | if (taps & BIT(i)) |
| 160 | ntap++; |
| 161 | else { |
| 162 | if (ntap > tap_cnt) { |
| 163 | tap_start = i - ntap; |
| 164 | tap_end = i - 1; |
| 165 | tap_cnt = ntap; |
| 166 | } |
| 167 | ntap = 0; |
| 168 | } |
| 169 | } |
| 170 | |
| 171 | if (ntap > tap_cnt) { |
| 172 | tap_start = i - ntap; |
| 173 | tap_end = i - 1; |
| 174 | tap_cnt = ntap; |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * If all of the TAP is OK, the sampling clock position is selected by |
| 179 | * identifying the change point of data. |
| 180 | */ |
| 181 | if (tap_cnt == tap_num * 2) { |
| 182 | match_cnt = 0; |
| 183 | ntap = 0; |
| 184 | tap_start = 0; |
| 185 | tap_end = 0; |
| 186 | for (i = 0; i < tap_num * 2; i++) { |
| 187 | if (smpcmp & BIT(i)) |
| 188 | ntap++; |
| 189 | else { |
| 190 | if (ntap > match_cnt) { |
| 191 | tap_start = i - ntap; |
| 192 | tap_end = i - 1; |
| 193 | match_cnt = ntap; |
| 194 | } |
| 195 | ntap = 0; |
| 196 | } |
| 197 | } |
| 198 | if (ntap > match_cnt) { |
| 199 | tap_start = i - ntap; |
| 200 | tap_end = i - 1; |
| 201 | match_cnt = ntap; |
| 202 | } |
| 203 | if (match_cnt) |
| 204 | select = true; |
| 205 | } else if (tap_cnt >= RENESAS_SDHI_MAX_TAP) |
| 206 | select = true; |
| 207 | |
| 208 | if (select) |
| 209 | tap_set = ((tap_start + tap_end) / 2) % tap_num; |
| 210 | else |
| 211 | return -EIO; |
| 212 | |
| 213 | /* Set SCC */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 214 | tmio_sd_writel(priv, tap_set, RENESAS_SDHI_SCC_TAPSET); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 215 | |
| 216 | /* Enable auto re-tuning */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 217 | reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 218 | reg |= RENESAS_SDHI_SCC_RVSCNTL_RVSEN; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 219 | tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 220 | |
| 221 | return 0; |
| 222 | } |
| 223 | |
| 224 | int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) |
| 225 | { |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 226 | struct tmio_sd_priv *priv = dev_get_priv(dev); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 227 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 228 | struct mmc *mmc = upriv->mmc; |
| 229 | unsigned int tap_num; |
| 230 | unsigned int taps = 0, smpcmp = 0; |
| 231 | int i, ret = 0; |
| 232 | u32 caps; |
| 233 | |
| 234 | /* Only supported on Renesas RCar */ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 235 | if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS)) |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 236 | return -EINVAL; |
| 237 | |
| 238 | /* clock tuning is not needed for upto 52MHz */ |
| 239 | if (!((mmc->selected_mode == MMC_HS_200) || |
| 240 | (mmc->selected_mode == UHS_SDR104) || |
| 241 | (mmc->selected_mode == UHS_SDR50))) |
| 242 | return 0; |
| 243 | |
| 244 | tap_num = renesas_sdhi_init_tuning(priv); |
| 245 | if (!tap_num) |
| 246 | /* Tuning is not supported */ |
| 247 | goto out; |
| 248 | |
| 249 | if (tap_num * 2 >= sizeof(taps) * 8) { |
| 250 | dev_err(dev, |
| 251 | "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); |
| 252 | goto out; |
| 253 | } |
| 254 | |
| 255 | /* Issue CMD19 twice for each tap */ |
| 256 | for (i = 0; i < 2 * tap_num; i++) { |
| 257 | renesas_sdhi_prepare_tuning(priv, i % tap_num); |
| 258 | |
| 259 | /* Force PIO for the tuning */ |
| 260 | caps = priv->caps; |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 261 | priv->caps &= ~TMIO_SD_CAP_DMA_INTERNAL; |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 262 | |
| 263 | ret = mmc_send_tuning(mmc, opcode, NULL); |
| 264 | |
| 265 | priv->caps = caps; |
| 266 | |
| 267 | if (ret == 0) |
| 268 | taps |= BIT(i); |
| 269 | |
| 270 | ret = renesas_sdhi_compare_scc_data(priv); |
| 271 | if (ret == 0) |
| 272 | smpcmp |= BIT(i); |
| 273 | |
| 274 | mdelay(1); |
| 275 | } |
| 276 | |
| 277 | ret = renesas_sdhi_select_tuning(priv, tap_num, taps, smpcmp); |
| 278 | |
| 279 | out: |
| 280 | if (ret < 0) { |
| 281 | dev_warn(dev, "Tuning procedure failed\n"); |
| 282 | renesas_sdhi_reset_tuning(priv); |
| 283 | } |
| 284 | |
| 285 | return ret; |
| 286 | } |
| 287 | #endif |
| 288 | |
| 289 | static int renesas_sdhi_set_ios(struct udevice *dev) |
| 290 | { |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 291 | int ret = tmio_sd_set_ios(dev); |
Marek Vasut | 33d3818 | 2018-04-09 20:47:31 +0200 | [diff] [blame] | 292 | |
| 293 | mdelay(10); |
| 294 | |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 295 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 296 | struct tmio_sd_priv *priv = dev_get_priv(dev); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 297 | |
| 298 | renesas_sdhi_reset_tuning(priv); |
| 299 | #endif |
| 300 | |
| 301 | return ret; |
| 302 | } |
| 303 | |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 304 | static const struct dm_mmc_ops renesas_sdhi_ops = { |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 305 | .send_cmd = tmio_sd_send_cmd, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 306 | .set_ios = renesas_sdhi_set_ios, |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 307 | .get_cd = tmio_sd_get_cd, |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 308 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
| 309 | .execute_tuning = renesas_sdhi_execute_tuning, |
| 310 | #endif |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 311 | }; |
| 312 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 313 | #define RENESAS_GEN2_QUIRKS TMIO_SD_CAP_RCAR_GEN2 |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 314 | #define RENESAS_GEN3_QUIRKS \ |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 315 | TMIO_SD_CAP_64BIT | TMIO_SD_CAP_RCAR_GEN3 | TMIO_SD_CAP_RCAR_UHS |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 316 | |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 317 | static const struct udevice_id renesas_sdhi_match[] = { |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 318 | { .compatible = "renesas,sdhi-r8a7790", .data = RENESAS_GEN2_QUIRKS }, |
| 319 | { .compatible = "renesas,sdhi-r8a7791", .data = RENESAS_GEN2_QUIRKS }, |
| 320 | { .compatible = "renesas,sdhi-r8a7792", .data = RENESAS_GEN2_QUIRKS }, |
| 321 | { .compatible = "renesas,sdhi-r8a7793", .data = RENESAS_GEN2_QUIRKS }, |
| 322 | { .compatible = "renesas,sdhi-r8a7794", .data = RENESAS_GEN2_QUIRKS }, |
| 323 | { .compatible = "renesas,sdhi-r8a7795", .data = RENESAS_GEN3_QUIRKS }, |
| 324 | { .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS }, |
| 325 | { .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS }, |
| 326 | { .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS }, |
| 327 | { .compatible = "renesas,sdhi-r8a77995", .data = RENESAS_GEN3_QUIRKS }, |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 328 | { /* sentinel */ } |
| 329 | }; |
| 330 | |
Marek Vasut | abe3e95 | 2018-04-08 17:45:23 +0200 | [diff] [blame] | 331 | static int renesas_sdhi_probe(struct udevice *dev) |
| 332 | { |
Masahiro Yamada | 19989d83 | 2018-04-20 18:14:24 +0900 | [diff] [blame] | 333 | struct tmio_sd_priv *priv = dev_get_priv(dev); |
Marek Vasut | abe3e95 | 2018-04-08 17:45:23 +0200 | [diff] [blame] | 334 | u32 quirks = dev_get_driver_data(dev); |
Marek Vasut | 1949d48 | 2018-04-08 18:14:22 +0200 | [diff] [blame] | 335 | struct fdt_resource reg_res; |
Masahiro Yamada | 19989d83 | 2018-04-20 18:14:24 +0900 | [diff] [blame] | 336 | struct clk clk; |
Marek Vasut | 1949d48 | 2018-04-08 18:14:22 +0200 | [diff] [blame] | 337 | DECLARE_GLOBAL_DATA_PTR; |
| 338 | int ret; |
| 339 | |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 340 | if (quirks == RENESAS_GEN2_QUIRKS) { |
| 341 | ret = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), |
| 342 | "reg", 0, ®_res); |
| 343 | if (ret < 0) { |
| 344 | dev_err(dev, "\"reg\" resource not found, ret=%i\n", |
| 345 | ret); |
| 346 | return ret; |
| 347 | } |
Marek Vasut | 1949d48 | 2018-04-08 18:14:22 +0200 | [diff] [blame] | 348 | |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 349 | if (fdt_resource_size(®_res) == 0x100) |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 350 | quirks |= TMIO_SD_CAP_16BIT; |
Marek Vasut | 9db9e6a | 2018-04-08 18:49:52 +0200 | [diff] [blame] | 351 | } |
Marek Vasut | abe3e95 | 2018-04-08 17:45:23 +0200 | [diff] [blame] | 352 | |
Masahiro Yamada | 19989d83 | 2018-04-20 18:14:24 +0900 | [diff] [blame] | 353 | ret = clk_get_by_index(dev, 0, &clk); |
| 354 | if (ret < 0) { |
| 355 | dev_err(dev, "failed to get host clock\n"); |
| 356 | return ret; |
| 357 | } |
| 358 | |
| 359 | /* set to max rate */ |
| 360 | priv->mclk = clk_set_rate(&clk, ULONG_MAX); |
| 361 | if (IS_ERR_VALUE(priv->mclk)) { |
| 362 | dev_err(dev, "failed to set rate for host clock\n"); |
| 363 | clk_free(&clk); |
| 364 | return priv->mclk; |
| 365 | } |
| 366 | |
| 367 | ret = clk_enable(&clk); |
| 368 | clk_free(&clk); |
| 369 | if (ret) { |
| 370 | dev_err(dev, "failed to enable host clock\n"); |
| 371 | return ret; |
| 372 | } |
| 373 | |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 374 | ret = tmio_sd_probe(dev, quirks); |
Marek Vasut | e0781e4 | 2018-04-08 19:09:17 +0200 | [diff] [blame] | 375 | #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) |
| 376 | if (!ret) |
| 377 | renesas_sdhi_reset_tuning(dev_get_priv(dev)); |
| 378 | #endif |
| 379 | return ret; |
Marek Vasut | abe3e95 | 2018-04-08 17:45:23 +0200 | [diff] [blame] | 380 | } |
| 381 | |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 382 | U_BOOT_DRIVER(renesas_sdhi) = { |
| 383 | .name = "renesas-sdhi", |
| 384 | .id = UCLASS_MMC, |
| 385 | .of_match = renesas_sdhi_match, |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 386 | .bind = tmio_sd_bind, |
Marek Vasut | abe3e95 | 2018-04-08 17:45:23 +0200 | [diff] [blame] | 387 | .probe = renesas_sdhi_probe, |
Marek Vasut | fd83e76 | 2018-04-13 23:51:33 +0200 | [diff] [blame] | 388 | .priv_auto_alloc_size = sizeof(struct tmio_sd_priv), |
| 389 | .platdata_auto_alloc_size = sizeof(struct tmio_sd_plat), |
Marek Vasut | 06485cf | 2018-04-08 15:22:58 +0200 | [diff] [blame] | 390 | .ops = &renesas_sdhi_ops, |
| 391 | }; |