Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2017 - All Rights Reserved |
| 4 | * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. |
| 5 | */ |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 6 | /dts-v1/; |
| 7 | |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 8 | #include "stm32mp157c.dtsi" |
| 9 | #include "stm32mp157-pinctrl.dtsi" |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 10 | #include <dt-bindings/gpio/gpio.h> |
Patrick Delaunay | 91be594 | 2019-02-04 11:26:16 +0100 | [diff] [blame] | 11 | #include <dt-bindings/mfd/st,stpmic1.h> |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 12 | |
| 13 | / { |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 14 | model = "STMicroelectronics STM32MP157C eval daughter"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 15 | compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; |
| 16 | |
| 17 | chosen { |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 18 | stdout-path = "serial0:115200n8"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 19 | }; |
| 20 | |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 21 | memory@c0000000 { |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 22 | reg = <0xC0000000 0x40000000>; |
| 23 | }; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 24 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 25 | aliases { |
| 26 | serial0 = &uart4; |
| 27 | }; |
| 28 | |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 29 | sd_switch: regulator-sd_switch { |
| 30 | compatible = "regulator-gpio"; |
| 31 | regulator-name = "sd_switch"; |
| 32 | regulator-min-microvolt = <1800000>; |
| 33 | regulator-max-microvolt = <2900000>; |
| 34 | regulator-type = "voltage"; |
| 35 | regulator-always-on; |
| 36 | |
| 37 | gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; |
| 38 | gpios-states = <0>; |
| 39 | states = <1800000 0x1 2900000 0x0>; |
| 40 | }; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 41 | }; |
| 42 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 43 | &hwspinlock { |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 44 | status = "okay"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | &i2c4 { |
| 48 | pinctrl-names = "default"; |
| 49 | pinctrl-0 = <&i2c4_pins_a>; |
| 50 | i2c-scl-rising-time-ns = <185>; |
| 51 | i2c-scl-falling-time-ns = <20>; |
| 52 | status = "okay"; |
| 53 | |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 54 | pmic: stpmic1@33 { |
| 55 | compatible = "st,stpmic1"; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 56 | reg = <0x33>; |
| 57 | interrupts = <0 2>; |
| 58 | interrupt-parent = <&gpioa>; |
| 59 | interrupt-controller; |
| 60 | #interrupt-cells = <2>; |
| 61 | status = "okay"; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 62 | |
| 63 | st,main_control_register = <0x04>; |
| 64 | st,vin_control_register = <0xc0>; |
| 65 | st,usb_control_register = <0x30>; |
| 66 | |
| 67 | regulators { |
Patrick Delaunay | d79218f | 2019-02-04 11:26:17 +0100 | [diff] [blame] | 68 | compatible = "st,stpmic1-regulators"; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 69 | |
| 70 | ldo1-supply = <&v3v3>; |
| 71 | ldo2-supply = <&v3v3>; |
| 72 | ldo3-supply = <&vdd_ddr>; |
| 73 | ldo5-supply = <&v3v3>; |
| 74 | ldo6-supply = <&v3v3>; |
| 75 | pwr_sw1-supply = <&bst_out>; |
| 76 | pwr_sw2-supply = <&bst_out>; |
| 77 | |
| 78 | vddcore: buck1 { |
| 79 | regulator-name = "vddcore"; |
| 80 | regulator-min-microvolt = <800000>; |
| 81 | regulator-max-microvolt = <1350000>; |
| 82 | regulator-always-on; |
| 83 | regulator-initial-mode = <2>; |
| 84 | regulator-over-current-protection; |
| 85 | |
| 86 | regulator-state-standby { |
| 87 | regulator-on-in-suspend; |
| 88 | regulator-suspend-microvolt = <1200000>; |
| 89 | regulator-mode = <8>; |
| 90 | }; |
| 91 | regulator-state-mem { |
| 92 | regulator-off-in-suspend; |
| 93 | }; |
| 94 | regulator-state-disk { |
| 95 | regulator-off-in-suspend; |
| 96 | }; |
| 97 | }; |
| 98 | |
| 99 | vdd_ddr: buck2 { |
| 100 | regulator-name = "vdd_ddr"; |
| 101 | regulator-min-microvolt = <1350000>; |
| 102 | regulator-max-microvolt = <1350000>; |
| 103 | regulator-always-on; |
| 104 | regulator-initial-mode = <2>; |
| 105 | regulator-over-current-protection; |
| 106 | |
| 107 | regulator-state-standby { |
| 108 | regulator-suspend-microvolt = <1350000>; |
| 109 | regulator-on-in-suspend; |
| 110 | regulator-mode = <8>; |
| 111 | }; |
| 112 | regulator-state-mem { |
| 113 | regulator-suspend-microvolt = <1350000>; |
| 114 | regulator-on-in-suspend; |
| 115 | regulator-mode = <8>; |
| 116 | }; |
| 117 | regulator-state-disk { |
| 118 | regulator-off-in-suspend; |
| 119 | }; |
| 120 | }; |
| 121 | |
| 122 | vdd: buck3 { |
| 123 | regulator-name = "vdd"; |
| 124 | regulator-min-microvolt = <3300000>; |
| 125 | regulator-max-microvolt = <3300000>; |
| 126 | regulator-always-on; |
| 127 | st,mask_reset; |
| 128 | regulator-initial-mode = <8>; |
| 129 | regulator-over-current-protection; |
| 130 | |
| 131 | regulator-state-standby { |
| 132 | regulator-suspend-microvolt = <3300000>; |
| 133 | regulator-on-in-suspend; |
| 134 | regulator-mode = <8>; |
| 135 | }; |
| 136 | regulator-state-mem { |
| 137 | regulator-suspend-microvolt = <3300000>; |
| 138 | regulator-on-in-suspend; |
| 139 | regulator-mode = <8>; |
| 140 | }; |
| 141 | regulator-state-disk { |
| 142 | regulator-suspend-microvolt = <3300000>; |
| 143 | regulator-on-in-suspend; |
| 144 | regulator-mode = <8>; |
| 145 | }; |
| 146 | }; |
| 147 | |
| 148 | v3v3: buck4 { |
| 149 | regulator-name = "v3v3"; |
| 150 | regulator-min-microvolt = <3300000>; |
| 151 | regulator-max-microvolt = <3300000>; |
| 152 | regulator-boot-on; |
| 153 | regulator-over-current-protection; |
| 154 | regulator-initial-mode = <8>; |
| 155 | |
| 156 | regulator-state-standby { |
| 157 | regulator-suspend-microvolt = <3300000>; |
| 158 | regulator-unchanged-in-suspend; |
| 159 | regulator-mode = <8>; |
| 160 | }; |
| 161 | regulator-state-mem { |
| 162 | regulator-off-in-suspend; |
| 163 | }; |
| 164 | regulator-state-disk { |
| 165 | regulator-off-in-suspend; |
| 166 | }; |
| 167 | }; |
| 168 | |
| 169 | vdda: ldo1 { |
| 170 | regulator-name = "vdda"; |
| 171 | regulator-min-microvolt = <2900000>; |
| 172 | regulator-max-microvolt = <2900000>; |
| 173 | interrupts = <IT_CURLIM_LDO1 0>; |
| 174 | interrupt-parent = <&pmic>; |
| 175 | |
| 176 | regulator-state-standby { |
| 177 | regulator-suspend-microvolt = <2900000>; |
| 178 | regulator-unchanged-in-suspend; |
| 179 | }; |
| 180 | regulator-state-mem { |
| 181 | regulator-off-in-suspend; |
| 182 | }; |
| 183 | regulator-state-disk { |
| 184 | regulator-off-in-suspend; |
| 185 | }; |
| 186 | }; |
| 187 | |
| 188 | v2v8: ldo2 { |
| 189 | regulator-name = "v2v8"; |
| 190 | regulator-min-microvolt = <2800000>; |
| 191 | regulator-max-microvolt = <2800000>; |
| 192 | interrupts = <IT_CURLIM_LDO2 0>; |
| 193 | interrupt-parent = <&pmic>; |
| 194 | |
| 195 | regulator-state-standby { |
| 196 | regulator-suspend-microvolt = <2800000>; |
| 197 | regulator-unchanged-in-suspend; |
| 198 | }; |
| 199 | regulator-state-mem { |
| 200 | regulator-off-in-suspend; |
| 201 | }; |
| 202 | regulator-state-disk { |
| 203 | regulator-off-in-suspend; |
| 204 | }; |
| 205 | }; |
| 206 | |
| 207 | vtt_ddr: ldo3 { |
| 208 | regulator-name = "vtt_ddr"; |
| 209 | regulator-min-microvolt = <0000000>; |
| 210 | regulator-max-microvolt = <1000000>; |
| 211 | regulator-always-on; |
| 212 | regulator-over-current-protection; |
| 213 | |
| 214 | regulator-state-standby { |
| 215 | regulator-off-in-suspend; |
| 216 | }; |
| 217 | regulator-state-mem { |
| 218 | regulator-off-in-suspend; |
| 219 | }; |
| 220 | regulator-state-disk { |
| 221 | regulator-off-in-suspend; |
| 222 | }; |
| 223 | }; |
| 224 | |
| 225 | vdd_usb: ldo4 { |
| 226 | regulator-name = "vdd_usb"; |
| 227 | regulator-min-microvolt = <3300000>; |
| 228 | regulator-max-microvolt = <3300000>; |
| 229 | interrupts = <IT_CURLIM_LDO4 0>; |
| 230 | interrupt-parent = <&pmic>; |
| 231 | |
| 232 | regulator-state-standby { |
| 233 | regulator-unchanged-in-suspend; |
| 234 | }; |
| 235 | regulator-state-mem { |
| 236 | regulator-off-in-suspend; |
| 237 | }; |
| 238 | regulator-state-disk { |
| 239 | regulator-off-in-suspend; |
| 240 | }; |
| 241 | }; |
| 242 | |
| 243 | vdd_sd: ldo5 { |
| 244 | regulator-name = "vdd_sd"; |
| 245 | regulator-min-microvolt = <2900000>; |
| 246 | regulator-max-microvolt = <2900000>; |
| 247 | interrupts = <IT_CURLIM_LDO5 0>; |
| 248 | interrupt-parent = <&pmic>; |
| 249 | regulator-boot-on; |
| 250 | |
| 251 | regulator-state-standby { |
| 252 | regulator-suspend-microvolt = <2900000>; |
| 253 | regulator-unchanged-in-suspend; |
| 254 | }; |
| 255 | regulator-state-mem { |
| 256 | regulator-off-in-suspend; |
| 257 | }; |
| 258 | regulator-state-disk { |
| 259 | regulator-off-in-suspend; |
| 260 | }; |
| 261 | }; |
| 262 | |
| 263 | v1v8: ldo6 { |
| 264 | regulator-name = "v1v8"; |
| 265 | regulator-min-microvolt = <1800000>; |
| 266 | regulator-max-microvolt = <1800000>; |
| 267 | interrupts = <IT_CURLIM_LDO6 0>; |
| 268 | interrupt-parent = <&pmic>; |
| 269 | |
| 270 | regulator-state-standby { |
| 271 | regulator-suspend-microvolt = <1800000>; |
| 272 | regulator-unchanged-in-suspend; |
| 273 | }; |
| 274 | regulator-state-mem { |
| 275 | regulator-off-in-suspend; |
| 276 | }; |
| 277 | regulator-state-disk { |
| 278 | regulator-off-in-suspend; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | vref_ddr: vref_ddr { |
| 283 | regulator-name = "vref_ddr"; |
| 284 | regulator-always-on; |
| 285 | regulator-over-current-protection; |
| 286 | |
| 287 | regulator-state-standby { |
| 288 | regulator-on-in-suspend; |
| 289 | }; |
| 290 | regulator-state-mem { |
| 291 | regulator-on-in-suspend; |
| 292 | }; |
| 293 | regulator-state-disk { |
| 294 | regulator-off-in-suspend; |
| 295 | }; |
| 296 | }; |
| 297 | |
| 298 | bst_out: boost { |
| 299 | regulator-name = "bst_out"; |
| 300 | interrupts = <IT_OCP_BOOST 0>; |
| 301 | interrupt-parent = <&pmic>; |
| 302 | }; |
| 303 | |
| 304 | vbus_otg: pwr_sw1 { |
| 305 | regulator-name = "vbus_otg"; |
| 306 | interrupts = <IT_OCP_OTG 0>; |
| 307 | interrupt-parent = <&pmic>; |
| 308 | regulator-active-discharge; |
| 309 | }; |
| 310 | |
| 311 | vbus_sw: pwr_sw2 { |
| 312 | regulator-name = "vbus_sw"; |
| 313 | interrupts = <IT_OCP_SWOUT 0>; |
| 314 | interrupt-parent = <&pmic>; |
| 315 | regulator-active-discharge; |
| 316 | }; |
| 317 | }; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 318 | }; |
| 319 | }; |
| 320 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 321 | &iwdg2 { |
| 322 | timeout-sec = <32>; |
| 323 | status = "okay"; |
| 324 | }; |
| 325 | |
| 326 | &pinctrl { |
| 327 | hwlocks = <&hwspinlock 0>; |
| 328 | }; |
| 329 | |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 330 | &pwr { |
| 331 | pwr-supply = <&vdd>; |
| 332 | }; |
| 333 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 334 | &rng1 { |
| 335 | status = "okay"; |
| 336 | }; |
| 337 | |
| 338 | &rtc { |
| 339 | status = "okay"; |
| 340 | }; |
| 341 | |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 342 | &sdmmc1 { |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 343 | pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; |
| 344 | broken-cd; |
Patrice Chotard | 882d72e | 2019-02-12 17:17:58 +0100 | [diff] [blame] | 345 | st,sig-dir; |
| 346 | st,neg-edge; |
| 347 | st,use-ckin; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 348 | bus-width = <4>; |
Patrice Chotard | f6ef229 | 2018-04-26 17:13:11 +0200 | [diff] [blame] | 349 | vmmc-supply = <&vdd_sd>; |
| 350 | vqmmc-supply = <&sd_switch>; |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 351 | sd-uhs-sdr12; |
| 352 | sd-uhs-sdr25; |
| 353 | sd-uhs-sdr50; |
| 354 | sd-uhs-ddr50; |
| 355 | sd-uhs-sdr104; |
| 356 | status = "okay"; |
| 357 | }; |
| 358 | |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 359 | &sdmmc2 { |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 360 | pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; |
| 361 | non-removable; |
| 362 | no-sd; |
| 363 | no-sdio; |
Patrice Chotard | 882d72e | 2019-02-12 17:17:58 +0100 | [diff] [blame] | 364 | st,sig-dir; |
| 365 | st,neg-edge; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 366 | bus-width = <8>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 367 | vmmc-supply = <&v3v3>; |
| 368 | vqmmc-supply = <&vdd>; |
Patrick Delaunay | 8d05010 | 2018-03-20 10:54:52 +0100 | [diff] [blame] | 369 | status = "okay"; |
| 370 | }; |
| 371 | |
Patrice Chotard | 00442d0 | 2019-02-12 16:50:38 +0100 | [diff] [blame] | 372 | &timers6 { |
| 373 | status = "okay"; |
| 374 | timer@5 { |
| 375 | status = "okay"; |
| 376 | }; |
| 377 | }; |
| 378 | |
Patrick Delaunay | 06020d8 | 2018-03-12 10:46:17 +0100 | [diff] [blame] | 379 | &uart4 { |
| 380 | pinctrl-names = "default"; |
| 381 | pinctrl-0 = <&uart4_pins_a>; |
| 382 | status = "okay"; |
| 383 | }; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 384 | |
| 385 | &usbphyc_port0 { |
| 386 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 387 | }; |
| 388 | |
| 389 | &usbphyc_port1 { |
| 390 | phy-supply = <&vdd_usb>; |
Patrick Delaunay | 5059914 | 2018-07-09 15:17:19 +0200 | [diff] [blame] | 391 | }; |