| Troy Kisky | 80b6b09 | 2012-02-07 14:08:48 +0000 | [diff] [blame] | 1 | #ifndef _MICREL_H |
| 2 | |
| 3 | #define MII_KSZ9021_EXT_COMMON_CTRL 0x100 |
| 4 | #define MII_KSZ9021_EXT_STRAP_STATUS 0x101 |
| 5 | #define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE 0x102 |
| 6 | #define MII_KSZ9021_EXT_OP_STRAP_STATUS 0x103 |
| 7 | #define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW 0x104 |
| 8 | #define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW 0x105 |
| 9 | #define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW 0x106 |
| 10 | #define MII_KSZ9021_EXT_ANALOG_TEST 0x107 |
| SARTRE Leo | eaf68ac | 2013-04-30 16:57:25 +0200 | [diff] [blame] | 11 | /* Register operations */ |
| 12 | #define MII_KSZ9031_MOD_REG 0x0000 |
| 13 | /* Data operations */ |
| 14 | #define MII_KSZ9031_MOD_DATA_NO_POST_INC 0x4000 |
| 15 | #define MII_KSZ9031_MOD_DATA_POST_INC_RW 0x8000 |
| 16 | #define MII_KSZ9031_MOD_DATA_POST_INC_W 0xC000 |
| Troy Kisky | 80b6b09 | 2012-02-07 14:08:48 +0000 | [diff] [blame] | 17 | |
| Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 18 | #define MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW 0x4 |
| 19 | #define MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW 0x5 |
| 20 | #define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW 0x6 |
| 21 | #define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW 0x8 |
| 22 | |
| Troy Kisky | 80b6b09 | 2012-02-07 14:08:48 +0000 | [diff] [blame] | 23 | struct phy_device; |
| 24 | int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val); |
| 25 | int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum); |
| 26 | |
| SARTRE Leo | eaf68ac | 2013-04-30 16:57:25 +0200 | [diff] [blame] | 27 | int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr, |
| 28 | int regnum, u16 mode, u16 val); |
| 29 | int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr, |
| 30 | int regnum, u16 mode); |
| 31 | |
| Troy Kisky | 80b6b09 | 2012-02-07 14:08:48 +0000 | [diff] [blame] | 32 | #endif |