blob: 7f8787ffb0de507998bc78a5ed9d9b9f6bf42e39 [file] [log] [blame]
Tom Rini364d0022023-01-10 11:19:45 -05001#define CFG_SYS_HRCW_LOW (\
Mario Six94867102019-01-21 09:17:54 +01002 (CONFIG_LBMC_CLOCK_MODE << (31 - 0)) |\
3 (CONFIG_DDR_MC_CLOCK_MODE << (31 - 1)) |\
4 (CONFIG_SYSTEM_PLL_VCO_DIV << (31 - 3)) |\
5 (CONFIG_SYSTEM_PLL_FACTOR << (31 - 7)) |\
6 (CONFIG_CORE_PLL_RATIO << (31 - 15)) |\
7 (CONFIG_QUICC_VCO_DIVIDER << (31 - 25)) |\
8 (CONFIG_QUICC_DIV_FACTOR << (31 - 26)) |\
9 (CONFIG_QUICC_MULT_FACTOR << (31 - 31)) \
10 )
11
Tom Rini364d0022023-01-10 11:19:45 -050012#define CFG_SYS_HRCW_HIGH (\
Mario Six94867102019-01-21 09:17:54 +010013 (CONFIG_PCI_HOST_MODE << (31 - 0)) |\
14 (CONFIG_PCI_64BIT_MODE << (31 - 1)) |\
15 (CONFIG_PCI_INT_ARBITER1 << (31 - 2)) |\
16 (CONFIG_PCI_INT_ARBITER2 << (31 - 3)) |\
17 (CONFIG_PCI_CLOCK_OUTPUT_DRIVE << (31 - 3)) |\
18 (CONFIG_CORE_DISABLE_MODE << (31 - 4)) |\
19 (CONFIG_BOOT_MEMORY_SPACE << (31 - 5)) |\
20 (CONFIG_BOOT_SEQUENCER << (31 - 7)) |\
21 (CONFIG_SOFTWARE_WATCHDOG << (31 - 8)) |\
22 (CONFIG_BOOT_ROM_INTERFACE << (31 - 13)) |\
Tom Rini291ab562021-09-09 07:54:53 -040023 (CONFIG_TSEC1_MODE << (31 - 18)) |\
24 (CONFIG_TSEC2_MODE << (31 - 21)) |\
Mario Six94867102019-01-21 09:17:54 +010025 (CONFIG_SECONDARY_DDR_IO << (31 - 27)) |\
26 (CONFIG_TRUE_LITTLE_ENDIAN << (31 - 28)) |\
27 (CONFIG_LALE_TIMING << (31 - 29)) |\
28 (CONFIG_LDP_PIN_MUX_STATE << (31 - 30)) \
29 )