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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Paul Burton7fb05072013-11-08 11:18:49 +00002/*
3 * Copyright (C) 2013 Imagination Technologies
Paul Burtonb8551b92017-10-30 16:58:21 -07004 * Author: Paul Burton <paul.burton@mips.com>
Paul Burton7fb05072013-11-08 11:18:49 +00005 *
6 * Setup code for the FDC37M817 super I/O controller
Paul Burton7fb05072013-11-08 11:18:49 +00007 */
8
9#include <common.h>
10#include <asm/io.h>
11
12#define SIO_CONF_PORT 0x3f0
13#define SIO_DATA_PORT 0x3f1
14
15enum sio_conf_key {
16 SIOCONF_DEVNUM = 0x07,
17 SIOCONF_ACTIVATE = 0x30,
18 SIOCONF_ENTER_SETUP = 0x55,
19 SIOCONF_BASE_HIGH = 0x60,
20 SIOCONF_BASE_LOW = 0x61,
21 SIOCONF_PRIMARY_INT = 0x70,
22 SIOCONF_EXIT_SETUP = 0xaa,
23 SIOCONF_MODE = 0xf0,
24};
25
26static struct {
27 u8 key;
28 u8 data;
29} sio_config[] = {
30 /* tty0 */
31 { SIOCONF_DEVNUM, 0x04 },
32 { SIOCONF_BASE_HIGH, 0x03 },
33 { SIOCONF_BASE_LOW, 0xf8 },
34 { SIOCONF_MODE, 0x02 },
35 { SIOCONF_PRIMARY_INT, 0x04 },
36 { SIOCONF_ACTIVATE, 0x01 },
37
38 /* tty1 */
39 { SIOCONF_DEVNUM, 0x05 },
40 { SIOCONF_BASE_HIGH, 0x02 },
41 { SIOCONF_BASE_LOW, 0xf8 },
42 { SIOCONF_MODE, 0x02 },
43 { SIOCONF_PRIMARY_INT, 0x03 },
44 { SIOCONF_ACTIVATE, 0x01 },
45};
46
Paul Burtondd37a142016-01-29 13:54:54 +000047void malta_superio_init(void)
Paul Burton7fb05072013-11-08 11:18:49 +000048{
49 unsigned i;
50
51 /* enter config state */
Paul Burtondd37a142016-01-29 13:54:54 +000052 outb(SIOCONF_ENTER_SETUP, SIO_CONF_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000053
54 /* configure peripherals */
55 for (i = 0; i < ARRAY_SIZE(sio_config); i++) {
Paul Burtondd37a142016-01-29 13:54:54 +000056 outb(sio_config[i].key, SIO_CONF_PORT);
57 outb(sio_config[i].data, SIO_DATA_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000058 }
59
60 /* exit config state */
Paul Burtondd37a142016-01-29 13:54:54 +000061 outb(SIOCONF_EXIT_SETUP, SIO_CONF_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000062}