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Tom Rini53633a82024-02-29 12:33:36 -05001Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
2
3Required properties:
4 - compatible: value should be one of the following:
5 "atmel,at91sam9n12-hlcdc"
6 "atmel,at91sam9x5-hlcdc"
7 "atmel,sama5d2-hlcdc"
8 "atmel,sama5d3-hlcdc"
9 "atmel,sama5d4-hlcdc"
10 "microchip,sam9x60-hlcdc"
11 "microchip,sam9x75-xlcdc"
12 - reg: base address and size of the HLCDC device registers.
13 - clock-names: the name of the 3 clocks requested by the HLCDC device.
14 Should contain "periph_clk", "sys_clk" and "slow_clk".
15 - clocks: should contain the 3 clocks requested by the HLCDC device.
16 - interrupts: should contain the description of the HLCDC interrupt line
17
18The HLCDC IP exposes two subdevices:
19 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
20 - a Display Controller: see ../display/atmel/hlcdc-dc.txt
21
22Example:
23
24 hlcdc: hlcdc@f0030000 {
25 compatible = "atmel,sama5d3-hlcdc";
26 reg = <0xf0030000 0x2000>;
27 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
28 clock-names = "periph_clk","sys_clk", "slow_clk";
29 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
30
31 hlcdc-display-controller {
32 compatible = "atmel,hlcdc-display-controller";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 port@0 {
39 #address-cells = <1>;
40 #size-cells = <0>;
41 reg = <0>;
42
43 hlcdc_panel_output: endpoint@0 {
44 reg = <0>;
45 remote-endpoint = <&panel_input>;
46 };
47 };
48 };
49
50 hlcdc_pwm: hlcdc-pwm {
51 compatible = "atmel,hlcdc-pwm";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_lcd_pwm>;
54 #pwm-cells = <3>;
55 };
56 };