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git01.mediatek.com / filogic / uboot / de649e64b4f6f56bfb8ae91190e7a43aa6792443 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: 8237782408528d6008844d2747484250f340866b [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]5#define USB_CLASS_HUB 9
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]6
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]7/ {
8 aliases {
9 mmc0 = &sdhci;
10 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]11 pci0 = &pcie0;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]12 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]13
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]14 cic: syscon@ff620000 {
15 u-boot,dm-pre-reloc;
16 compatible = "rockchip,rk3399-cic", "syscon";
17 reg = <0x0 0xff620000 0x0 0x100>;
18 };
19
20 dfi: dfi@ff630000 {
21 u-boot,dm-pre-reloc;
22 reg = <0x00 0xff630000 0x00 0x4000>;
23 compatible = "rockchip,rk3399-dfi";
24 rockchip,pmu = <&pmugrf>;
25 clocks = <&cru PCLK_DDR_MON>;
26 clock-names = "pclk_ddr_mon";
27 };
28
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]29 rng: rng@ff8b8000 {
30 compatible = "rockchip,cryptov1-rng";
31 reg = <0x0 0xff8b8000 0x0 0x1000>;
32 status = "disabled";
33 };
34
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]35 dmc: dmc {
36 u-boot,dm-pre-reloc;
37 compatible = "rockchip,rk3399-dmc";
38 devfreq-events = <&dfi>;
39 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
40 clocks = <&cru SCLK_DDRCLK>;
41 clock-names = "dmc_clk";
42 reg = <0x0 0xffa80000 0x0 0x0800
43 0x0 0xffa80800 0x0 0x1800
44 0x0 0xffa82000 0x0 0x2000
45 0x0 0xffa84000 0x0 0x1000
46 0x0 0xffa88000 0x0 0x0800
47 0x0 0xffa88800 0x0 0x1800
48 0x0 0xffa8a000 0x0 0x2000
49 0x0 0xffa8c000 0x0 0x1000>;
50 };
51
52 pmusgrf: syscon@ff330000 {
53 u-boot,dm-pre-reloc;
54 compatible = "rockchip,rk3399-pmusgrf", "syscon";
55 reg = <0x0 0xff330000 0x0 0xe3d4>;
56 };
57
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]58};
59
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]60&cru {
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]61 u-boot,dm-pre-reloc;
62};
63
64&grf {
65 u-boot,dm-pre-reloc;
66};
67
68&pinctrl {
69 u-boot,dm-pre-reloc;
70};
71
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]72&pmu {
73 u-boot,dm-pre-reloc;
74};
75
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]76&pmugrf {
77 u-boot,dm-pre-reloc;
78};
79
80&pmu {
81 u-boot,dm-pre-reloc;
82};
83
84&pmucru {
85 u-boot,dm-pre-reloc;
86};
87
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]88&sdhci {
Jagan Teki5cc21182020-04-28 15:30:17 +0530[diff] [blame]89 max-frequency = <200000000>;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]90 u-boot,dm-pre-reloc;
91};
92
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]93&sdmmc {
94 u-boot,dm-pre-reloc;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]95
96 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
97 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]98};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]99
100&spi1 {
101 u-boot,dm-pre-reloc;
102};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]103
104&uart0 {
105 u-boot,dm-pre-reloc;
106};
107
108&uart2 {
109 u-boot,dm-pre-reloc;
110};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]111
112&vopb {
113 u-boot,dm-pre-reloc;
114};
115
116&vopl {
117 u-boot,dm-pre-reloc;
118};