| Wolfgang Denk | 0cbaf64 | 2005-09-25 00:53:22 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Thomas.Lange@corelatus.se |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
| 26 | #include <asm/au1x00.h> |
| 27 | #include <asm/mipsregs.h> |
| 28 | |
| 29 | long int initdram(int board_type) |
| 30 | { |
| 31 | /* Sdram is setup by assembler code */ |
| 32 | /* If memory could be changed, we should return the true value here */ |
| 33 | return 64*1024*1024; |
| 34 | } |
| 35 | |
| 36 | #define BCSR_PCMCIA_PC0DRVEN 0x0010 |
| 37 | #define BCSR_PCMCIA_PC0RST 0x0080 |
| 38 | |
| 39 | /* In cpu/mips/cpu.c */ |
| 40 | void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); |
| 41 | |
| 42 | int checkboard (void) |
| 43 | { |
| 44 | u16 status; |
| 45 | /* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */ |
| 46 | volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL; |
| 47 | u32 proc_id; |
| 48 | |
| 49 | *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ |
| 50 | |
| 51 | proc_id = read_32bit_cp0_register(CP0_PRID); |
| 52 | |
| 53 | switch (proc_id >> 24) { |
| 54 | case 0: |
| 55 | puts ("Board: Pb1000\n"); |
| 56 | printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n", |
| 57 | (proc_id >> 8) & 0xFF, proc_id & 0xFF); |
| 58 | break; |
| 59 | case 1: |
| 60 | puts ("Board: Pb1500\n"); |
| 61 | printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n", |
| 62 | (proc_id >> 8) & 0xFF, proc_id & 0xFF); |
| 63 | break; |
| 64 | case 2: |
| 65 | puts ("Board: Pb1100\n"); |
| 66 | printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n", |
| 67 | (proc_id >> 8) & 0xFF, proc_id & 0xFF); |
| 68 | break; |
| 69 | default: |
| 70 | printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); |
| 71 | } |
| 72 | #if defined(CONFIG_IDE_PCMCIA) && 0 |
| 73 | /* Enable 3.3 V on slot 0 ( VCC ) |
| 74 | No 5V */ |
| 75 | status = 4; |
| 76 | *pcmcia_bcsr = status; |
| 77 | |
| 78 | status |= BCSR_PCMCIA_PC0DRVEN; |
| 79 | *pcmcia_bcsr = status; |
| 80 | au_sync(); |
| 81 | |
| 82 | udelay(300*1000); |
| 83 | |
| 84 | status |= BCSR_PCMCIA_PC0RST; |
| 85 | *pcmcia_bcsr = status; |
| 86 | au_sync(); |
| 87 | |
| 88 | udelay(100*1000); |
| 89 | |
| 90 | /* PCMCIA is on a 36 bit physical address. |
| 91 | We need to map it into a 32 bit addresses */ |
| 92 | |
| 93 | #if 0 |
| 94 | /* We dont need theese unless we run whole pcmcia package */ |
| 95 | write_one_tlb(20, /* index */ |
| 96 | 0x01ffe000, /* Pagemask, 16 MB pages */ |
| 97 | CFG_PCMCIA_IO_BASE, /* Hi */ |
| 98 | 0x3C000017, /* Lo0 */ |
| 99 | 0x3C200017); /* Lo1 */ |
| 100 | |
| 101 | write_one_tlb(21, /* index */ |
| 102 | 0x01ffe000, /* Pagemask, 16 MB pages */ |
| 103 | CFG_PCMCIA_ATTR_BASE, /* Hi */ |
| 104 | 0x3D000017, /* Lo0 */ |
| 105 | 0x3D200017); /* Lo1 */ |
| 106 | #endif /* 0 */ |
| 107 | write_one_tlb(22, /* index */ |
| 108 | 0x01ffe000, /* Pagemask, 16 MB pages */ |
| 109 | CFG_PCMCIA_MEM_ADDR, /* Hi */ |
| 110 | 0x3E000017, /* Lo0 */ |
| 111 | 0x3E200017); /* Lo1 */ |
| 112 | #endif /* CONFIG_IDE_PCMCIA */ |
| 113 | |
| 114 | return 0; |
| 115 | } |