blob: 361fccebf728c1c0a8cabdb269649ac89e88b0e9 [file] [log] [blame]
Simon Glass40ffb682015-01-27 22:13:31 -07001/*
2 * Copyright (c) 2015, Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#include <common.h>
10#include <errno.h>
11#include <pci.h>
12#include <usb.h>
13
14#include "xhci.h"
15
16/*
17 * Create the appropriate control structures to manage a new XHCI host
18 * controller.
19 */
20int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
21 struct xhci_hcor **ret_hcor)
22{
23 struct xhci_hccr *hccr;
24 struct xhci_hcor *hcor;
25 pci_dev_t pdev;
26 uint32_t cmd;
27 int len;
28
29 pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index);
30 if (pdev < 0) {
31 printf("XHCI host controller not found\n");
32 return -1;
33 }
34
35 hccr = (struct xhci_hccr *)pci_map_bar(pdev,
36 PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
37 len = HC_LENGTH(xhci_readl(&hccr->cr_capbase));
38 hcor = (struct xhci_hcor *)((uint32_t)hccr + len);
39
40 debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
41 (uint32_t)hccr, (uint32_t)hcor, len);
42
43 *ret_hccr = hccr;
44 *ret_hcor = hcor;
45
46 /* enable busmaster */
47 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
48 cmd |= PCI_COMMAND_MASTER;
49 pci_write_config_dword(pdev, PCI_COMMAND, cmd);
50
51 return 0;
52}
53
54/*
55 * Destroy the appropriate control structures corresponding * to the XHCI host
56 * controller
57 */
58void xhci_hcd_stop(int index)
59{
60}