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git01.mediatek.com / filogic / uboot / de10c669865e838ff87619323a28cd73a0ff0d7b / . / arch / arm / mach-bcm283x / include / mach / timer.h
blob: 2a85f230e86d53f96315f7665d8042bbce57f572 [file] [log] [blame]
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]1/*
Stephen Warren8780f222015-02-16 12:16:14 -0700[diff] [blame]2 * (C) Copyright 2012,2015 Stephen Warren
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]3 *
Stephen Warren29e494c2015-02-16 12:16:13 -0700[diff] [blame]4 * SPDX-License-Identifier: GPL-2.0
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]5 */
6
7#ifndef _BCM2835_TIMER_H
8#define _BCM2835_TIMER_H
9
Stephen Warren9d5990b2016-03-16 21:40:56 -0600[diff] [blame]10#ifndef CONFIG_BCM2835
Stephen Warren8780f222015-02-16 12:16:14 -0700[diff] [blame]11#define BCM2835_TIMER_PHYSADDR 0x3f003000
12#else
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]13#define BCM2835_TIMER_PHYSADDR 0x20003000
Stephen Warren8780f222015-02-16 12:16:14 -0700[diff] [blame]14#endif
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]15
Marek Vasut08c5b7e2015-05-04 22:54:35 +0200[diff] [blame]16#define BCM2835_TIMER_CS_M3 (1 << 3)
17#define BCM2835_TIMER_CS_M2 (1 << 2)
18#define BCM2835_TIMER_CS_M1 (1 << 1)
19#define BCM2835_TIMER_CS_M0 (1 << 0)
20
21#ifndef __ASSEMBLY__
22#include <linux/types.h>
23
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]24struct bcm2835_timer_regs {
25 u32 cs;
26 u32 clo;
27 u32 chi;
28 u32 c0;
29 u32 c1;
30 u32 c2;
31 u32 c3;
32};
33
Stephen Warren37c1efa2013-03-27 18:43:23 +0000[diff] [blame]34extern ulong get_timer_us(ulong base);
35
Stephen Warren45b8ae62012-08-05 16:07:21 +0000[diff] [blame]36#endif
Marek Vasut08c5b7e2015-05-04 22:54:35 +0200[diff] [blame]37
38#endif