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Mingkai Hueee86ff2015-10-26 19:47:52 +08001/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __DDR_H__
8#define __DDR_H__
Shengzhou Liuddf060b2016-04-07 16:22:21 +08009
10extern void erratum_a008850_post(void);
11
Mingkai Hueee86ff2015-10-26 19:47:52 +080012struct board_specific_parameters {
13 u32 n_ranks;
14 u32 datarate_mhz_high;
15 u32 rank_gb;
16 u32 clk_adjust;
17 u32 wrlvl_start;
18 u32 wrlvl_ctl_2;
19 u32 wrlvl_ctl_3;
20 u32 cpo_override;
21 u32 write_data_delay;
22 u32 force_2t;
23};
24
25/*
26 * These tables contain all valid speeds we want to override with board
27 * specific parameters. datarate_mhz_high values need to be in ascending order
28 * for each n_ranks group.
29 */
30static const struct board_specific_parameters udimm0[] = {
31 /*
32 * memory controller 0
33 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
34 * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
35 */
36#ifdef CONFIG_SYS_FSL_DDR4
37 {1, 1666, 0, 6, 7, 0x07090800, 0x00000000,},
38 {1, 1900, 0, 6, 7, 0x07090800, 0x00000000,},
39 {1, 2200, 0, 6, 7, 0x07090800, 0x00000000,},
40#endif
41 {}
42};
43
44static const struct board_specific_parameters *udimms[] = {
45 udimm0,
46};
47
48#endif