Tim Harvey | 256dba0 | 2021-03-02 14:00:21 -0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2021 Gateworks Corporation |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <init.h> |
| 8 | #include <led.h> |
| 9 | #include <linux/delay.h> |
| 10 | #include <miiphy.h> |
| 11 | #include <netdev.h> |
| 12 | |
| 13 | #include <asm/arch/clock.h> |
| 14 | #include <asm/arch/sys_proto.h> |
| 15 | #include <asm/io.h> |
| 16 | |
| 17 | #include "gsc.h" |
| 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
| 21 | int board_phys_sdram_size(phys_size_t *size) |
| 22 | { |
| 23 | int ddr_size = readl(M4_BOOTROM_BASE_ADDR); |
| 24 | |
| 25 | if (ddr_size == 0x4) { |
| 26 | *size = 0x100000000; |
| 27 | } else if (ddr_size == 0x3) { |
| 28 | *size = 0xc0000000; |
| 29 | } else if (ddr_size == 0x2) { |
| 30 | *size = 0x80000000; |
| 31 | } else if (ddr_size == 0x1) { |
| 32 | *size = 0x40000000; |
| 33 | } else { |
| 34 | printf("Unknown DDR type!!!\n"); |
| 35 | *size = 0x40000000; |
| 36 | } |
| 37 | |
| 38 | return 0; |
| 39 | } |
| 40 | |
| 41 | int board_fit_config_name_match(const char *name) |
| 42 | { |
| 43 | int i = 0; |
| 44 | const char *dtb; |
| 45 | char buf[32]; |
| 46 | |
| 47 | do { |
| 48 | dtb = gsc_get_dtb_name(i++, buf, sizeof(buf)); |
| 49 | if (!strcmp(dtb, name)) |
| 50 | return 0; |
| 51 | } while (dtb); |
| 52 | |
| 53 | return -1; |
| 54 | } |
| 55 | |
| 56 | #if (IS_ENABLED(CONFIG_FEC_MXC)) |
| 57 | static int setup_fec(void) |
| 58 | { |
| 59 | struct iomuxc_gpr_base_regs *gpr = |
| 60 | (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; |
| 61 | |
| 62 | /* Use 125M anatop REF_CLK1 for ENET1, not from external */ |
| 63 | clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); |
| 64 | |
| 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | int board_phy_config(struct phy_device *phydev) |
| 69 | { |
| 70 | unsigned short val; |
| 71 | |
| 72 | switch (phydev->phy_id) { |
| 73 | case 0x2000a231: /* TI DP83867 GbE PHY */ |
| 74 | puts("DP83867 "); |
| 75 | /* LED configuration */ |
| 76 | val = 0; |
| 77 | val |= 0x5 << 4; /* LED1(Amber;Speed) : 1000BT link */ |
| 78 | val |= 0xb << 8; /* LED2(Green;Link/Act): blink for TX/RX act */ |
| 79 | phy_write(phydev, MDIO_DEVAD_NONE, 24, val); |
| 80 | break; |
| 81 | } |
| 82 | |
| 83 | if (phydev->drv->config) |
| 84 | phydev->drv->config(phydev); |
| 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | #endif // IS_ENABLED(CONFIG_FEC_MXC) |
| 89 | |
| 90 | int board_init(void) |
| 91 | { |
| 92 | gsc_init(1); |
| 93 | |
| 94 | if (IS_ENABLED(CONFIG_FEC_MXC)) |
| 95 | setup_fec(); |
| 96 | |
| 97 | gsc_hwmon(); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | int board_late_init(void) |
| 103 | { |
| 104 | const char *ethmac; |
| 105 | char env[32]; |
| 106 | int ret, i; |
| 107 | u8 enetaddr[6]; |
| 108 | |
| 109 | led_default_state(); |
| 110 | |
| 111 | /* Set mac addrs */ |
| 112 | i = 0; |
| 113 | do { |
| 114 | if (i) |
| 115 | sprintf(env, "eth%daddr", i); |
| 116 | else |
| 117 | sprintf(env, "ethaddr"); |
| 118 | ethmac = env_get(env); |
| 119 | if (!ethmac) { |
| 120 | ret = gsc_getmac(i, enetaddr); |
| 121 | if (!ret) |
| 122 | eth_env_set_enetaddr(env, enetaddr); |
| 123 | } |
| 124 | i++; |
| 125 | } while (!ret); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | int board_mmc_get_env_dev(int devno) |
| 131 | { |
| 132 | return devno; |
| 133 | } |