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git01.mediatek.com / filogic / uboot / dd2600e5708b4a1a6d60962ee0e12fa2b11c0860 / . / dts / upstream / src / arm64 / qcom / sc7180-trogdor-r1.dts
blob: d393a2712ce68de6b68289f28dced0bfd2fcc9ce [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Trogdor board device tree source
4 *
5 * Copyright 2020 Google LLC.
6 */
7
8/dts-v1/;
9
10#include "sc7180-trogdor.dtsi"
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame]11#include "sc7180-trogdor-clamshell.dtsi"
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]12#include "sc7180-trogdor-rt5682i-sku.dtsi"
13#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
14
15/ {
16 model = "Google Trogdor (rev1+)";
17 compatible = "google,trogdor", "qcom,sc7180";
18};
19
20&ap_tp_i2c {
21 status = "okay";
22};
23
24ap_ts_pen_1v8: &i2c4 {
25 status = "okay";
26 clock-frequency = <400000>;
27
28 ap_ts: touchscreen@10 {
29 compatible = "elan,ekth3500";
30 reg = <0x10>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
33
34 interrupt-parent = <&tlmm>;
35 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
36
37 vcc33-supply = <&pp3300_ts>;
38
39 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
40 };
41};
42
43&panel {
44 compatible = "auo,b116xa01";
45};
46
47&sdhc_2 {
48 status = "okay";
49};
50
51&trackpad {
52 interrupts = <58 IRQ_TYPE_EDGE_FALLING>;
53};
54
55&usb_hub_2_x {
56 vdd-supply = <&pp3300_l7c>;
57};
58
59&usb_hub_3_x {
60 vdd-supply = <&pp3300_l7c>;
61};
62
63/* PINCTRL - modifications to sc7180-trogdor.dtsi */
64
65&trackpad_int_1v8_odl {
66 pins = "gpio58";
67};
68
69/* PINCTRL - board-specific pinctrl */
70
71&tlmm {
72 gpio-line-names = "ESIM_MISO",
73 "ESIM_MOSI",
74 "ESIM_CLK",
75 "ESIM_CS_L",
76 "FP_TO_AP_IRQ_L",
77 "FP_RST_L",
78 "AP_TP_I2C_SDA",
79 "AP_TP_I2C_SCL",
80 "TS_RESET_L",
81 "TS_INT_L",
82 "FPMCU_BOOT0",
83 "EDP_BRIJ_IRQ",
84 "AP_EDP_BKLTEN",
85 "",
86 "",
87 "EDP_BRIJ_I2C_SDA",
88 "EDP_BRIJ_I2C_SCL",
89 "HUB_RST_L",
90 "PEN_RST_ODL",
91 "AP_RAM_ID1",
92 "AP_RAM_ID2",
93 "PEN_IRQ_L",
94 "FPMCU_SEL",
95 "AMP_EN",
96 "P_SENSOR_INT_L",
97 "AP_SAR_SENSOR_SDA",
98 "AP_SAR_SENSOR_SCL",
99 "",
100 "HP_IRQ",
101 "AP_RAM_ID0",
102 "EN_PP3300_DX_EDP",
103 "AP_BRD_ID2",
104 "BRIJ_SUSPEND",
105 "AP_BRD_ID0",
106 "AP_H1_SPI_MISO",
107 "AP_H1_SPI_MOSI",
108 "AP_H1_SPI_CLK",
109 "AP_H1_SPI_CS_L",
110 "",
111 "",
112 "",
113 "",
114 "H1_AP_INT_ODL",
115 "",
116 "UART_AP_TX_DBG_RX",
117 "UART_DBG_TX_AP_RX",
118 "HP_I2C_SDA",
119 "HP_I2C_SCL",
120 "FORCED_USB_BOOT",
121 "",
122 "",
123 "AMP_DIN",
124 "PEN_PDCT_L",
125 "HP_BCLK",
126 "HP_LRCLK",
127 "HP_DOUT",
128 "HP_DIN",
129 "HP_MCLK",
130 "TRACKPAD_INT_1V8_ODL",
131 "AP_EC_SPI_MISO",
132 "AP_EC_SPI_MOSI",
133 "AP_EC_SPI_CLK",
134 "AP_EC_SPI_CS_L",
135 "AP_SPI_CLK",
136 "AP_SPI_MOSI",
137 "AP_SPI_MISO",
138 /*
139 * AP_FLASH_WP_L is crossystem ABI. Schematics
140 * call it BIOS_FLASH_WP_L.
141 */
142 "AP_FLASH_WP_L",
143 "DBG_SPI_HOLD_L",
144 "AP_SPI_CS0_L",
145 "SD_CD_ODL",
146 "",
147 "",
148 "",
149 "",
150 "",
151 "UIM2_DATA",
152 "UIM2_CLK",
153 "UIM2_RST",
154 "UIM2_PRESENT",
155 "UIM1_DATA",
156 "UIM1_CLK",
157 "UIM1_RST",
158 "",
159 "EN_PP3300_CODEC",
160 "EN_PP3300_HUB",
161 "",
162 "AP_SPI_FP_MISO",
163 "AP_SPI_FP_MOSI",
164 "AP_SPI_FP_CLK",
165 "AP_SPI_FP_CS_L",
166 "AP_SKU_ID1",
167 "AP_RST_REQ",
168 "",
169 "AP_BRD_ID1",
170 "AP_EC_INT_L",
171 "",
172 "",
173 "",
174 "",
175 "",
176 "",
177 "",
178 "",
179 "",
180 "EDP_BRIJ_EN",
181 "AP_SKU_ID0",
182 "",
183 "",
184 "",
185 "",
186 "",
187 "",
188 "",
189 "",
190 "",
191 "AP_TS_PEN_I2C_SDA",
192 "AP_TS_PEN_I2C_SCL",
193 "DP_HOT_PLUG_DET",
194 "EC_IN_RW_ODL";
195};