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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
Pali Rohár10a953d2020-04-01 00:35:08 +02004 * Pali Rohár <pali@kernel.org>
Pali Rohár248ef0a2012-10-29 07:54:01 +00005 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
25
Pali Rohár248ef0a2012-10-29 07:54:01 +000026#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050027#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000028#include <asm/arch/mem.h>
29#include <linux/stringify.h>
30
Pali Rohár248ef0a2012-10-29 07:54:01 +000031/* Clock Defines */
32#define V_OSCK 26000000 /* Clock output from T2 */
33#define V_SCLK (V_OSCK >> 1)
34
Pali Rohár248ef0a2012-10-29 07:54:01 +000035#define CONFIG_UBI_SIZE (512 << 10)
Pali Rohár248ef0a2012-10-29 07:54:01 +000036
37/*
38 * Hardware drivers
39 */
40
41/*
42 * NS16550 Configuration
43 */
44#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
45
Pali Rohár248ef0a2012-10-29 07:54:01 +000046#define CONFIG_SYS_NS16550_SERIAL
47#define CONFIG_SYS_NS16550_REG_SIZE (-4)
48#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
49
50/*
51 * select serial console configuration
52 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000053#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000054
Pali Rohár248ef0a2012-10-29 07:54:01 +000055#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000056
Pali Rohár248ef0a2012-10-29 07:54:01 +000057/* USB device configuration */
58#define CONFIG_USB_DEVICE
Pali Rohárbba0bba2021-02-20 11:50:15 +010059#define CONFIG_USB_TTY
Pali Rohár248ef0a2012-10-29 07:54:01 +000060#define CONFIG_USBD_VENDORID 0x0421
Pali Rohárbba0bba2021-02-20 11:50:15 +010061#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8
62#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8
Pali Rohár248ef0a2012-10-29 07:54:01 +000063#define CONFIG_USBD_MANUFACTURER "Nokia"
Pali Rohárbba0bba2021-02-20 11:50:15 +010064#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)"
Pali Rohár248ef0a2012-10-29 07:54:01 +000065
Pali Rohár248ef0a2012-10-29 07:54:01 +000066#define GPIO_SLIDE 71
67
68/*
69 * Board ONENAND Info.
70 */
71
Pali Rohár248ef0a2012-10-29 07:54:01 +000072#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000073
Pali Rohár248ef0a2012-10-29 07:54:01 +000074/*
75 * Framebuffer
76 */
77/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +000078#define CONFIG_VIDEO_LOGO
79#define VIDEO_FB_16BPP_PIXEL_SWAP
80#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000081
82/* functions for cfb_console */
83#define VIDEO_KBD_INIT_FCT rx51_kp_init()
84#define VIDEO_TSTC_FCT rx51_kp_tstc
85#define VIDEO_GETC_FCT rx51_kp_getc
86#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -060087struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +000088int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -060089int rx51_kp_tstc(struct stdio_dev *sdev);
90int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +000091#endif
92
Pali Rohár248ef0a2012-10-29 07:54:01 +000093/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +000094#define CONFIG_EXTRA_ENV_SETTINGS \
Pali Rohár248ef0a2012-10-29 07:54:01 +000095 "usbtty=cdc_acm\0" \
Pali Rohárbba0bba2021-02-20 11:50:15 +010096 "stdin=usbtty,serial,vga\0" \
97 "stdout=usbtty,serial,vga\0" \
98 "stderr=usbtty,serial,vga\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +000099 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
100 "switchmmc=mmc dev ${mmcnum}\0" \
101 "kernaddr=0x82008000\0" \
102 "initrdaddr=0x84008000\0" \
103 "scriptaddr=0x86008000\0" \
104 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
105 "${loadaddr} ${mmcfile}\0" \
106 "kernload=setenv loadaddr ${kernaddr};" \
107 "setenv mmcfile ${mmckernfile};" \
108 "run fileload\0" \
109 "initrdload=setenv loadaddr ${initrdaddr};" \
110 "setenv mmcfile ${mmcinitrdfile};" \
111 "run fileload\0" \
112 "scriptload=setenv loadaddr ${scriptaddr};" \
113 "setenv mmcfile ${mmcscriptfile};" \
114 "run fileload\0" \
115 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
116 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
117 "kernboot=echo Booting ${mmckernfile} from mmc " \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200118 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \
119 "bootz ${kernaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000120 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
Pali Rohár0a8825c2021-06-18 15:27:03 +0200121 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \
122 "bootz ${kernaddr} ${initrdaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000123 "attachboot=echo Booting attached kernel image ...;" \
124 "setenv setup_omap_atag 1;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200125 "bootm ${attkernaddr} || bootz ${attkernaddr};" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000126 "setenv setup_omap_atag\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200127 "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \
128 "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \
129 "trymmckerninitrdboot=run switchmmc && run initrdload && " \
130 "run kernload && run kerninitrdboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000131 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200132 "setenv mmckernfile uImage; run trymmckernboot;" \
133 "setenv mmckernfile zImage; run trymmckernboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000134 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
135 "setenv mmcpart 2; run trymmcpartboot;" \
136 "setenv mmcpart 3; run trymmcpartboot;" \
137 "setenv mmcpart 4; run trymmcpartboot\0" \
138 "trymmcboot=if run switchmmc; then " \
139 "setenv mmctype fat;" \
140 "run trymmcallpartboot;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000141 "setenv mmctype ext4;" \
142 "run trymmcallpartboot;" \
143 "fi\0" \
144 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
145 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200146 "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \
147 "setenv mmctype ext4 && run trymmcscriptboot\0" \
148 "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \
149 "setenv mmcnum 0 && run trymmcbootmenu || " \
150 "setenv mmcnum 1 && run trymmcbootmenu;" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200151 "if run slide; then true; else " \
152 "setenv bootmenu_delay 0;" \
153 "setenv bootdelay 0;" \
154 "fi\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000155 "menucmd=bootmenu\0" \
156 "bootmenu_0=Attached kernel=run attachboot\0" \
157 "bootmenu_1=Internal eMMC=run emmcboot\0" \
158 "bootmenu_2=External SD card=run sdboot\0" \
159 "bootmenu_3=U-Boot boot order=boot\0" \
160 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000161 ""
162
Pali Rohár13eb3e42013-03-07 05:15:19 +0000163#define CONFIG_POSTBOOTMENU \
164 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000165 "echo Extra commands:;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000166 "echo run sdboot - Boot from SD card slot.;" \
167 "echo run emmcboot - Boot internal eMMC memory.;" \
168 "echo run attachboot - Boot attached kernel image.;" \
169 "echo"
170
171#define CONFIG_BOOTCOMMAND \
172 "run sdboot;" \
173 "run emmcboot;" \
174 "run attachboot;" \
175 "echo"
176
Pali Rohár248ef0a2012-10-29 07:54:01 +0000177/*
178 * OMAP3 has 12 GP timers, they can be driven by the system clock
179 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
180 * This rate is divided by a local divisor.
181 */
182#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
183#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000184
185/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000186 * Physical Memory Map
187 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000188#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
189
190/*
191 * FLASH and environment organization
192 */
193
Pali Rohár248ef0a2012-10-29 07:54:01 +0000194#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
195#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
196#define CONFIG_SYS_INIT_RAM_SIZE 0x800
197#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
198 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
199
200/*
201 * Attached kernel image
202 */
203
204#define SDRAM_SIZE 0x10000000 /* 256 MB */
205#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
206
207#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
208#define KERNEL_OFFSET 0x40000 /* 256 kB */
209#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
210#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
211
212/* Reserve protected RAM for attached kernel */
213#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
214
215#endif /* __CONFIG_H */