Simon Glass | dcfac35 | 2014-11-12 22:42:15 -0700 | [diff] [blame^] | 1 | Intel LPC Device Binding |
| 2 | ======================== |
| 3 | |
| 4 | The device tree node which describes the operation of the Intel Low Pin |
| 5 | Count device is as follows: |
| 6 | |
| 7 | Required properties : |
| 8 | - compatible = "intel,lpc" |
| 9 | - gen-dec : Specifies the values for the gen-dec registers. Up to four cell |
| 10 | pairs can be provided - the first of each pair is the base address and |
| 11 | the second is the size. These are written into the GENx_DEC registers of |
| 12 | the LPC device |
| 13 | |
| 14 | |
| 15 | Example |
| 16 | ------- |
| 17 | |
| 18 | lpc { |
| 19 | compatible = "intel,lpc"; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <1>; |
| 22 | gen-dec = <0x800 0xfc 0x900 0xfc>; |
| 23 | }; |