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wdenk7133d4c2002-09-12 22:42:52 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#ifndef _POST_H
24#define _POST_H
25
26#ifndef __ASSEMBLY__
27#include <common.h>
28#endif
29
30#ifdef CONFIG_POST
31
32#define POST_POWERON 0x01 /* test runs on power-on booting */
wdenkdccbda02003-07-14 22:13:32 +000033#define POST_NORMAL 0x02 /* test runs on normal booting */
34#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */
wdenk7133d4c2002-09-12 22:42:52 +000035#define POST_POWERTEST 0x08 /* test runs after watchdog reset */
36
37#define POST_ROM 0x0100 /* test runs in ROM */
38#define POST_RAM 0x0200 /* test runs in RAM */
39#define POST_MANUAL 0x0400 /* test runs on diag command */
40#define POST_REBOOT 0x0800 /* test may cause rebooting */
wdenk9dfa8d12002-12-08 09:53:23 +000041#define POST_PREREL 0x1000 /* test runs before relocation */
wdenk7133d4c2002-09-12 22:42:52 +000042
43#define POST_MEM (POST_RAM | POST_ROM)
wdenkdccbda02003-07-14 22:13:32 +000044#define POST_ALWAYS (POST_NORMAL | \
45 POST_SLOWTEST | \
46 POST_MANUAL | \
wdenk7133d4c2002-09-12 22:42:52 +000047 POST_POWERON )
48
49#ifndef __ASSEMBLY__
50
51struct post_test {
52 char *name;
53 char *cmd;
54 char *desc;
55 int flags;
56 int (*test) (int flags);
wdenkc08f1582003-04-27 22:52:51 +000057 int (*init_f) (void);
58 void (*reloc) (void);
wdenk9dfa8d12002-12-08 09:53:23 +000059 unsigned long testid;
wdenk7133d4c2002-09-12 22:42:52 +000060};
wdenkc08f1582003-04-27 22:52:51 +000061int post_init_f (void);
wdenk7133d4c2002-09-12 22:42:52 +000062void post_bootmode_init (void);
63int post_bootmode_get (unsigned int * last_test);
64void post_bootmode_clear (void);
wdenk9dfa8d12002-12-08 09:53:23 +000065void post_output_backlog ( void );
wdenk7133d4c2002-09-12 22:42:52 +000066int post_run (char *name, int flags);
67int post_info (char *name);
68int post_log (char *format, ...);
69void post_reloc (void);
wdenkc08f1582003-04-27 22:52:51 +000070unsigned long post_time_ms (unsigned long base);
wdenk7133d4c2002-09-12 22:42:52 +000071
72extern struct post_test post_list[];
73extern unsigned int post_list_size;
wdenkdccbda02003-07-14 22:13:32 +000074extern int post_hotkeys_pressed(gd_t *);
wdenk7133d4c2002-09-12 22:42:52 +000075
76#endif /* __ASSEMBLY__ */
77
78#define CFG_POST_RTC 0x00000001
79#define CFG_POST_WATCHDOG 0x00000002
80#define CFG_POST_MEMORY 0x00000004
81#define CFG_POST_CPU 0x00000008
82#define CFG_POST_I2C 0x00000010
83#define CFG_POST_CACHE 0x00000020
84#define CFG_POST_UART 0x00000040
85#define CFG_POST_ETHER 0x00000080
86#define CFG_POST_SPI 0x00000100
87#define CFG_POST_USB 0x00000200
88#define CFG_POST_SPR 0x00000400
wdenkc08f1582003-04-27 22:52:51 +000089#define CFG_POST_SYSMON 0x00000800
wdenk7133d4c2002-09-12 22:42:52 +000090
91#endif /* CONFIG_POST */
92
93#endif /* _POST_H */