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git01.mediatek.com / filogic / uboot / dca22e5eda0d0148c42970b29d7f4019e9742cc3 / . / arch / arm / dts / r8a77950-salvator-x.dts
blob: c6ca61a8ed40eb9d2cc37e9a547b698311fe6fe9 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]2/*
Marek Vasutadaa0162020-04-04 16:12:48 +0200[diff] [blame]3 * Device Tree Source for the Salvator-X board with R-Car H3 ES1.x
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]4 *
5 * Copyright (C) 2015 Renesas Electronics Corp.
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]6 */
7
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]8/dts-v1/;
Marek Vasutadaa0162020-04-04 16:12:48 +0200[diff] [blame]9#include "r8a77950.dtsi"
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]10#include "salvator-x.dtsi"
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]11
12/ {
Marek Vasutadaa0162020-04-04 16:12:48 +0200[diff] [blame]13 model = "Renesas Salvator-X board based on r8a77950";
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]14 compatible = "renesas,salvator-x", "renesas,r8a7795";
15
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]16 memory@48000000 {
17 device_type = "memory";
18 /* first 128MB is reserved for secure area. */
19 reg = <0x0 0x48000000 0x0 0x38000000>;
20 };
21
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]22 memory@500000000 {
23 device_type = "memory";
24 reg = <0x5 0x00000000 0x0 0x40000000>;
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]25 };
26
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]27 memory@600000000 {
28 device_type = "memory";
29 reg = <0x6 0x00000000 0x0 0x40000000>;
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]30 };
31
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]32 memory@700000000 {
33 device_type = "memory";
34 reg = <0x7 0x00000000 0x0 0x40000000>;
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]35 };
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]36};
Marek Vasutb938f382017-07-21 23:16:59 +0200[diff] [blame]37
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]38&du {
39 clocks = <&cpg CPG_MOD 724>,
40 <&cpg CPG_MOD 723>,
41 <&cpg CPG_MOD 722>,
42 <&cpg CPG_MOD 721>,
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]43 <&versaclock5 1>,
44 <&x21_clk>,
45 <&x22_clk>,
46 <&versaclock5 2>;
Marek Vasutfde558e2019-03-04 22:53:28 +0100[diff] [blame]47 clock-names = "du.0", "du.1", "du.2", "du.3",
Marek Vasut36f83d92017-09-12 23:01:51 +0200[diff] [blame]48 "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
49};