| Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 1 | |
| 2 | -------------------------------------------- |
| 3 | SOCFPGA Documentation for U-Boot and SPL |
| 4 | -------------------------------------------- |
| 5 | |
| 6 | This README is about U-Boot and SPL support for Altera's ARM Cortex-A9MPCore |
| 7 | based SOCFPGA. To know more about the hardware itself, please refer to |
| 8 | www.altera.com. |
| 9 | |
| 10 | |
| 11 | -------------------------------------------- |
| 12 | socfpga_dw_mmc |
| 13 | -------------------------------------------- |
| 14 | Here are macro and detailed configuration required to enable DesignWare SDMMC |
| 15 | controller support within SOCFPGA |
| 16 | |
| Chin Liang See | cca9f45 | 2013-12-30 18:26:14 -0600 | [diff] [blame] | 17 | #define CONFIG_GENERIC_MMC |
| 18 | -> Enable the generic MMC driver |
| 19 | |
| 20 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 |
| 21 | -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM |
| 22 | |
| 23 | #define CONFIG_DWMMC |
| 24 | -> Enable the common DesignWare SDMMC controller framework |
| 25 | |
| 26 | #define CONFIG_SOCFPGA_DWMMC |
| 27 | -> Enable the SOCFPGA specific driver for DesignWare SDMMC controller |