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stroesede46bb62003-09-12 08:41:24 +00001/*
2 * (C) Copyright 2001-2003
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
Matthias Fuchs5dde4e22009-02-20 10:19:19 +010026#include <asm/io.h>
stroesede46bb62003-09-12 08:41:24 +000027#include <command.h>
28#include <malloc.h>
29
Wolfgang Denk6405a152006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
stroesede46bb62003-09-12 08:41:24 +000031
32/* fpga configuration data - not compressed, generated by bin2c */
33const unsigned char fpgadata[] =
34{
35#include "fpgadata.c"
36};
37int filesize = sizeof(fpgadata);
38
39
wdenkda55c6e2004-01-20 23:12:12 +000040int board_early_init_f (void)
stroesede46bb62003-09-12 08:41:24 +000041{
42 /*
43 * IRQ 0-15 405GP internally generated; active high; level sensitive
44 * IRQ 16 405GP internally generated; active low; level sensitive
45 * IRQ 17-24 RESERVED
46 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
47 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
48 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
49 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
50 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
51 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
52 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
53 */
54 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
55 mtdcr(uicer, 0x00000000); /* disable all ints */
56 mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
57 mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
58 mtdcr(uictr, 0x10000000); /* set int trigger levels */
59 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
60 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
61
62 /*
63 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
64 */
65 mtebc (epcr, 0xa8400000); /* ebc always driven */
66
stroese4d34bbf2004-12-16 18:35:58 +000067 /*
68 * Reset CPLD via GPIO13 (CS4) pin
69 */
Matthias Fuchs5dde4e22009-02-20 10:19:19 +010070 out_be32((void *)GPIO0_OR,
71 in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 13));
stroese4d34bbf2004-12-16 18:35:58 +000072 udelay(1000); /* wait 1ms */
Matthias Fuchs5dde4e22009-02-20 10:19:19 +010073 out_be32((void *)GPIO0_OR,
74 in_be32((void *)GPIO0_OR) | (0x80000000 >> 13));
stroese4d34bbf2004-12-16 18:35:58 +000075 udelay(1000); /* wait 1ms */
76
stroesede46bb62003-09-12 08:41:24 +000077 return 0;
78}
79
stroesede46bb62003-09-12 08:41:24 +000080int misc_init_r (void)
81{
stroese4d34bbf2004-12-16 18:35:58 +000082 /* adjust flash start and offset */
83 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
84 gd->bd->bi_flashoffset = 0;
stroesede46bb62003-09-12 08:41:24 +000085
86 return (0);
87}
88
89
90/*
91 * Check Board Identity:
92 */
93
94int checkboard (void)
95{
Wolfgang Denk7fb52662005-10-13 16:45:02 +020096 char str[64];
stroesede46bb62003-09-12 08:41:24 +000097 int i = getenv_r ("serial#", str, sizeof(str));
98 unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
wdenk9c53f402003-10-15 23:53:47 +000099 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
stroesede46bb62003-09-12 08:41:24 +0000100 unsigned char id1, id2;
101
102 puts ("Board: ");
103
104 if (i == -1) {
105 puts ("### No HW ID - assuming DP405");
106 } else {
107 puts(str);
108 }
109
Matthias Fuchs5dde4e22009-02-20 10:19:19 +0100110 id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
111 id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
112 printf(" (ID=0x%1X%1X, PLD=0x%02X)\n",
113 id2, id1, in_8((void *)0xf0001000));
stroesede46bb62003-09-12 08:41:24 +0000114
115 return 0;
116}