Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2008 Miromico AG |
| 3 | * |
| 4 | * Configuration settings for the Miromico Hammerhead AVR32 board |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | #ifndef __CONFIG_H |
| 25 | #define __CONFIG_H |
| 26 | |
| 27 | #define CONFIG_AVR32 1 |
| 28 | #define CONFIG_AT32AP 1 |
| 29 | #define CONFIG_AT32AP7000 1 |
| 30 | #define CONFIG_HAMMERHEAD 1 |
| 31 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 32 | #define CONFIG_SYS_HZ 1000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * Set up the PLL to run at 125 MHz, the CPU to run at the PLL |
| 36 | * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency |
| 37 | * and the PBA bus to run at 1/4 the PLL frequency. |
| 38 | */ |
| 39 | #define CONFIG_PLL 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | #define CONFIG_SYS_POWER_MANAGER 1 |
| 41 | #define CONFIG_SYS_OSC0_HZ 25000000 |
| 42 | #define CONFIG_SYS_PLL0_DIV 1 |
| 43 | #define CONFIG_SYS_PLL0_MUL 5 |
| 44 | #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 |
| 45 | #define CONFIG_SYS_CLKDIV_CPU 0 |
| 46 | #define CONFIG_SYS_CLKDIV_HSB 1 |
| 47 | #define CONFIG_SYS_CLKDIV_PBA 2 |
| 48 | #define CONFIG_SYS_CLKDIV_PBB 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 49 | |
Haavard Skinnemoen | c6f292f | 2010-08-12 13:52:54 +0700 | [diff] [blame] | 50 | /* Reserve VM regions for SDRAM and NOR flash */ |
| 51 | #define CONFIG_SYS_NR_VM_REGIONS 2 |
| 52 | |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 53 | /* |
| 54 | * The PLLOPT register controls the PLL like this: |
| 55 | * icp = PLLOPT<2> |
| 56 | * ivco = PLLOPT<1:0> |
| 57 | * |
| 58 | * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). |
| 59 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 60 | #define CONFIG_SYS_PLL0_OPT 0x04 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 61 | |
| 62 | #define CONFIG_USART1 1 |
| 63 | |
| 64 | #define CONFIG_HOSTNAME hammerhead |
| 65 | |
| 66 | /* User serviceable stuff */ |
| 67 | #define CONFIG_DOS_PARTITION 1 |
| 68 | |
| 69 | #define CONFIG_CMDLINE_TAG 1 |
| 70 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 71 | #define CONFIG_INITRD_TAG 1 |
| 72 | |
| 73 | #define CONFIG_STACKSIZE (2048) |
| 74 | |
| 75 | #define CONFIG_BAUDRATE 115200 |
| 76 | #define CONFIG_BOOTARGS \ |
| 77 | "console=ttyS0 root=mtd1 rootfstype=jffs2" |
| 78 | #define CONFIG_BOOTCOMMAND \ |
| 79 | "fsload; bootm" |
| 80 | |
| 81 | /* |
| 82 | * Only interrupt autoboot if <space> is pressed. Otherwise, garbage |
| 83 | * data on the serial line may interrupt the boot sequence. |
| 84 | */ |
| 85 | #define CONFIG_BOOTDELAY 1 |
| 86 | #define CONFIG_AUTOBOOT 1 |
| 87 | #define CONFIG_AUTOBOOT_KEYED 1 |
| 88 | #define CONFIG_AUTOBOOT_PROMPT \ |
Haavard Skinnemoen | abdb55a | 2008-08-20 09:28:36 +0200 | [diff] [blame] | 89 | "Press SPACE to abort autoboot in %d seconds\n", bootdelay |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 90 | #define CONFIG_AUTOBOOT_DELAY_STR "d" |
| 91 | #define CONFIG_AUTOBOOT_STOP_STR " " |
| 92 | |
| 93 | /* |
| 94 | * After booting the board for the first time, new ethernet address |
| 95 | * should be generated and assigned to the environment variables |
| 96 | * "ethaddr". This is normally done during production. |
| 97 | */ |
| 98 | #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 |
| 99 | #define CONFIG_NET_MULTI 1 |
| 100 | |
| 101 | /* |
| 102 | * BOOTP/DHCP options |
| 103 | */ |
| 104 | #define CONFIG_BOOTP_SUBNETMASK |
| 105 | #define CONFIG_BOOTP_GATEWAY |
| 106 | |
| 107 | /* |
| 108 | * Command line configuration. |
| 109 | */ |
| 110 | #include <config_cmd_default.h> |
| 111 | |
| 112 | #define CONFIG_CMD_ASKENV |
| 113 | #define CONFIG_CMD_DHCP |
| 114 | #define CONFIG_CMD_EXT2 |
| 115 | #define CONFIG_CMD_FAT |
| 116 | #define CONFIG_CMD_JFFS2 |
| 117 | #define CONFIG_CMD_MMC |
| 118 | #undef CONFIG_CMD_FPGA |
| 119 | #undef CONFIG_CMD_SETGETDCR |
| 120 | |
| 121 | #define CONFIG_ATMEL_USART 1 |
| 122 | #define CONFIG_MACB 1 |
Haavard Skinnemoen | 610b362 | 2008-08-29 21:09:49 +0200 | [diff] [blame] | 123 | #define CONFIG_PORTMUX_PIO 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_NR_PIOS 5 |
| 125 | #define CONFIG_SYS_HSDRAMC 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 126 | #define CONFIG_MMC 1 |
| 127 | #define CONFIG_ATMEL_MCI 1 |
| 128 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #define CONFIG_SYS_DCACHE_LINESZ 32 |
| 130 | #define CONFIG_SYS_ICACHE_LINESZ 32 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 131 | |
| 132 | #define CONFIG_NR_DRAM_BANKS 1 |
| 133 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_FLASH_CFI 1 |
Haavard Skinnemoen | bce7c13 | 2008-08-20 09:40:16 +0200 | [diff] [blame] | 135 | #define CONFIG_FLASH_CFI_DRIVER 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 136 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_FLASH_BASE 0x00000000 |
| 138 | #define CONFIG_SYS_FLASH_SIZE 0x800000 |
| 139 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 140 | #define CONFIG_SYS_MAX_FLASH_SECT 135 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 141 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 143 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_INTRAM_BASE 0x24000000 |
| 145 | #define CONFIG_SYS_INTRAM_SIZE 0x8000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 146 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 147 | #define CONFIG_SYS_SDRAM_BASE 0x10000000 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 149 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 150 | #define CONFIG_ENV_SIZE 65536 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 152 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 154 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_MALLOC_LEN (256*1024) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 156 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 157 | #define CONFIG_SYS_DMA_ALLOC_LEN (16384) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 158 | |
| 159 | /* Allow 4MB for the kernel run-time image */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00400000) |
| 161 | #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 162 | |
| 163 | /* Other configuration settings that shouldn't have to change all that often */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | #define CONFIG_SYS_PROMPT "Hammerhead> " |
| 165 | #define CONFIG_SYS_CBSIZE 256 |
| 166 | #define CONFIG_SYS_MAXARGS 16 |
| 167 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 168 | #define CONFIG_SYS_LONGHELP 1 |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 169 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 170 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 171 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 172 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } |
Julien May | 72646d2 | 2008-06-23 13:57:52 +0200 | [diff] [blame] | 174 | |
| 175 | #endif /* __CONFIG_H */ |