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Matthias Kaehlcke3b8d1a42010-01-31 17:39:49 +01001/*
2 * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
3 *
4 * Copyright (C) 2004, 2005
5 * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Matthias Kaehlcke3b8d1a42010-01-31 17:39:49 +01008 */
9
10#ifndef _EP93XX_ETH_H
11#define _EP93XX_ETH_H
12
13#include <net.h>
14
15/**
16 * #define this to dump device status and queue info during initialization and
17 * following errors.
18 */
19#undef EP93XX_MAC_DEBUG
20
21/**
22 * Number of descriptor and status entries in our RX queues.
23 * It must be power of 2 !
24 */
25#define NUMRXDESC PKTBUFSRX
26
27/**
28 * Number of descriptor and status entries in our TX queues.
29 */
30#define NUMTXDESC 1
31
32/**
33 * 944 = (1024 - 64) - 16, Fifo size - Minframesize - 16 (Chip FACT)
34 */
35#define TXSTARTMAX 944
36
37/**
38 * Receive descriptor queue entry
39 */
40struct rx_descriptor {
41 uint32_t word1;
42 uint32_t word2;
43};
44
45/**
46 * Receive status queue entry
47 */
48struct rx_status {
49 uint32_t word1;
50 uint32_t word2;
51};
52
53#define RX_STATUS_RWE(rx_status) ((rx_status->word1 >> 30) & 0x01)
54#define RX_STATUS_RFP(rx_status) ((rx_status->word1 >> 31) & 0x01)
55#define RX_STATUS_FRAME_LEN(rx_status) (rx_status->word2 & 0xFFFF)
56
57/**
58 * Transmit descriptor queue entry
59 */
60struct tx_descriptor {
61 uint32_t word1;
62 uint32_t word2;
63};
64
65#define TX_DESC_EOF (1 << 31)
66
67/**
68 * Transmit status queue entry
69 */
70struct tx_status {
71 uint32_t word1;
72};
73
74#define TX_STATUS_TXWE(tx_status) (((tx_status)->word1 >> 30) & 0x01)
75#define TX_STATUS_TXFP(tx_status) (((tx_status)->word1 >> 31) & 0x01)
76
77/**
78 * Transmit descriptor queue
79 */
80struct tx_descriptor_queue {
81 struct tx_descriptor *base;
82 struct tx_descriptor *current;
83 struct tx_descriptor *end;
84};
85
86/**
87 * Transmit status queue
88 */
89struct tx_status_queue {
90 struct tx_status *base;
91 volatile struct tx_status *current;
92 struct tx_status *end;
93};
94
95/**
96 * Receive descriptor queue
97 */
98struct rx_descriptor_queue {
99 struct rx_descriptor *base;
100 struct rx_descriptor *current;
101 struct rx_descriptor *end;
102};
103
104/**
105 * Receive status queue
106 */
107struct rx_status_queue {
108 struct rx_status *base;
109 volatile struct rx_status *current;
110 struct rx_status *end;
111};
112
113/**
114 * EP93xx MAC private data structure
115 */
116struct ep93xx_priv {
117 struct rx_descriptor_queue rx_dq;
118 struct rx_status_queue rx_sq;
119 void *rx_buffer[NUMRXDESC];
120
121 struct tx_descriptor_queue tx_dq;
122 struct tx_status_queue tx_sq;
123
124 struct mac_regs *regs;
125};
126
127#endif