Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Author: Fabio Estevam <fabio.estevam@freescale.com> |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 9 | #include <init.h> |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 10 | #include <asm/io.h> |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 11 | #include <asm/gpio.h> |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 12 | #include <asm/arch/imx-regs.h> |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 13 | #include <asm/arch/iomux-mx25.h> |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 14 | #include <asm/arch/clock.h> |
| 15 | #include <mmc.h> |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 16 | #include <fsl_esdhc_imx.h> |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 17 | #include <i2c.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame^] | 18 | #include <linux/delay.h> |
Fabio Estevam | 592fd4e | 2012-12-11 04:58:02 +0000 | [diff] [blame] | 19 | #include <power/pmic.h> |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 20 | #include <fsl_pmic.h> |
| 21 | #include <mc34704.h> |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 22 | |
Benoît Thébaudeau | 518e7a9 | 2013-05-03 10:32:15 +0000 | [diff] [blame] | 23 | #define FEC_RESET_B IMX_GPIO_NR(4, 8) |
| 24 | #define FEC_ENABLE_B IMX_GPIO_NR(2, 3) |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 25 | #define CARD_DETECT IMX_GPIO_NR(2, 1) |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 26 | |
| 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 29 | #ifdef CONFIG_FSL_ESDHC_IMX |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 30 | struct fsl_esdhc_cfg esdhc_cfg[1] = { |
| 31 | {IMX_MMC_SDHC1_BASE}, |
| 32 | }; |
| 33 | #endif |
| 34 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 35 | /* |
| 36 | * FIXME: need to revisit this |
| 37 | * The original code enabled PUE and 100-k pull-down without PKE, so the right |
| 38 | * value here is likely: |
| 39 | * 0 for no pull |
| 40 | * or: |
| 41 | * PAD_CTL_PUS_100K_DOWN for 100-k pull-down |
| 42 | */ |
| 43 | #define FEC_OUT_PAD_CTRL 0 |
| 44 | |
| 45 | #define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \ |
| 46 | PAD_CTL_ODE) |
| 47 | |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 48 | static void mx25pdk_fec_init(void) |
| 49 | { |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 50 | static const iomux_v3_cfg_t fec_pads[] = { |
| 51 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, |
| 52 | MX25_PAD_FEC_RX_DV__FEC_RX_DV, |
| 53 | MX25_PAD_FEC_RDATA0__FEC_RDATA0, |
| 54 | NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL), |
| 55 | NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL), |
| 56 | NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL), |
| 57 | MX25_PAD_FEC_MDIO__FEC_MDIO, |
| 58 | MX25_PAD_FEC_RDATA1__FEC_RDATA1, |
| 59 | NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL), |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 60 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 61 | NEW_PAD_CTRL(MX25_PAD_D12__GPIO_4_8, 0), /* FEC_RESET_B */ |
| 62 | NEW_PAD_CTRL(MX25_PAD_A17__GPIO_2_3, 0), /* FEC_ENABLE_B */ |
| 63 | }; |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 64 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 65 | static const iomux_v3_cfg_t i2c_pads[] = { |
| 66 | NEW_PAD_CTRL(MX25_PAD_I2C1_CLK__I2C1_CLK, I2C_PAD_CTRL), |
| 67 | NEW_PAD_CTRL(MX25_PAD_I2C1_DAT__I2C1_DAT, I2C_PAD_CTRL), |
| 68 | }; |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 69 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 70 | imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 71 | |
| 72 | /* Assert RESET and ENABLE low */ |
| 73 | gpio_direction_output(FEC_RESET_B, 0); |
| 74 | gpio_direction_output(FEC_ENABLE_B, 0); |
| 75 | |
| 76 | udelay(10); |
| 77 | |
| 78 | /* Deassert RESET and ENABLE */ |
| 79 | gpio_set_value(FEC_RESET_B, 1); |
| 80 | gpio_set_value(FEC_ENABLE_B, 1); |
| 81 | |
| 82 | /* Setup I2C pins so that PMIC can turn on PHY supply */ |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 83 | imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads)); |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 84 | } |
| 85 | |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 86 | int dram_init(void) |
| 87 | { |
| 88 | /* dram_init must store complete ramsize in gd->ram_size */ |
| 89 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
| 90 | PHYS_SDRAM_1_SIZE); |
| 91 | return 0; |
| 92 | } |
| 93 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 94 | /* |
| 95 | * Set up input pins with hysteresis and 100-k pull-ups |
| 96 | */ |
| 97 | #define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP) |
| 98 | /* |
| 99 | * FIXME: need to revisit this |
| 100 | * The original code enabled PUE and 100-k pull-down without PKE, so the right |
| 101 | * value here is likely: |
| 102 | * 0 for no pull |
| 103 | * or: |
| 104 | * PAD_CTL_PUS_100K_DOWN for 100-k pull-down |
| 105 | */ |
| 106 | #define UART1_OUT_PAD_CTRL 0 |
| 107 | |
| 108 | static void mx25pdk_uart1_init(void) |
| 109 | { |
| 110 | static const iomux_v3_cfg_t uart1_pads[] = { |
| 111 | NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL), |
| 112 | NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL), |
| 113 | NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL), |
| 114 | NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL), |
| 115 | }; |
| 116 | |
| 117 | imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
| 118 | } |
| 119 | |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 120 | int board_early_init_f(void) |
| 121 | { |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 122 | mx25pdk_uart1_init(); |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 123 | |
| 124 | return 0; |
| 125 | } |
| 126 | |
| 127 | int board_init(void) |
| 128 | { |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 129 | /* address of boot parameters */ |
| 130 | gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
| 131 | |
| 132 | return 0; |
| 133 | } |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 134 | |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 135 | int board_late_init(void) |
| 136 | { |
| 137 | struct pmic *p; |
Fabio Estevam | 592fd4e | 2012-12-11 04:58:02 +0000 | [diff] [blame] | 138 | int ret; |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 139 | |
| 140 | mx25pdk_fec_init(); |
| 141 | |
Fabio Estevam | f330cec | 2013-11-20 21:17:36 -0200 | [diff] [blame] | 142 | ret = pmic_init(I2C_0); |
Fabio Estevam | 592fd4e | 2012-12-11 04:58:02 +0000 | [diff] [blame] | 143 | if (ret) |
| 144 | return ret; |
| 145 | |
| 146 | p = pmic_get("FSL_PMIC"); |
| 147 | if (!p) |
| 148 | return -ENODEV; |
| 149 | |
Fabio Estevam | 4eb32c2 | 2015-02-21 17:22:50 -0200 | [diff] [blame] | 150 | /* Turn on Ethernet PHY and LCD supplies */ |
| 151 | pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE | ONOFFA); |
Fabio Estevam | 90c3aae | 2012-10-23 06:34:53 +0000 | [diff] [blame] | 152 | |
| 153 | return 0; |
| 154 | } |
| 155 | |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 156 | #ifdef CONFIG_FSL_ESDHC_IMX |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 157 | int board_mmc_getcd(struct mmc *mmc) |
| 158 | { |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 159 | /* Set up the Card Detect pin. */ |
| 160 | imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_A15__GPIO_2_1, 0)); |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 161 | |
| 162 | gpio_direction_input(CARD_DETECT); |
| 163 | return !gpio_get_value(CARD_DETECT); |
| 164 | } |
| 165 | |
| 166 | int board_mmc_init(bd_t *bis) |
| 167 | { |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 168 | static const iomux_v3_cfg_t sdhc1_pads[] = { |
| 169 | NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL), |
| 170 | NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL), |
| 171 | NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL), |
| 172 | NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL), |
| 173 | NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL), |
| 174 | NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL), |
| 175 | }; |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 176 | |
Benoît Thébaudeau | a12f222 | 2013-05-03 10:32:14 +0000 | [diff] [blame] | 177 | imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads)); |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 178 | |
Benoît Thébaudeau | 2e0071b | 2017-05-03 11:59:06 +0200 | [diff] [blame] | 179 | /* |
| 180 | * Set the eSDHC1 PER clock to the maximum frequency lower than or equal |
| 181 | * to 50 MHz that can be obtained, which requires to use UPLL as the |
| 182 | * clock source. This actually gives 48 MHz. |
| 183 | */ |
| 184 | imx_set_perclk(MXC_ESDHC1_CLK, true, 50000000); |
Fabio Estevam | 1de48fa | 2012-10-23 06:34:49 +0000 | [diff] [blame] | 185 | esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); |
| 186 | return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); |
| 187 | } |
| 188 | #endif |
Fabio Estevam | adac83a | 2011-09-06 09:05:43 +0000 | [diff] [blame] | 189 | |
| 190 | int checkboard(void) |
| 191 | { |
| 192 | puts("Board: MX25PDK\n"); |
| 193 | |
| 194 | return 0; |
| 195 | } |
Fabio Estevam | 1385f46 | 2016-01-11 18:09:15 -0200 | [diff] [blame] | 196 | |
| 197 | /* Lowlevel init isn't used on mx25pdk, so just provide a dummy one here */ |
| 198 | void lowlevel_init(void) {} |