Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
Jean-Christophe PLAGNIOL-VILLARD | b780301 | 2007-11-24 21:17:55 +0100 | [diff] [blame] | 2 | # |
| 3 | # (C) Copyright 2000-2007 |
| 4 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Jean-Christophe PLAGNIOL-VILLARD | b780301 | 2007-11-24 21:17:55 +0100 | [diff] [blame] | 5 | |
Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 6 | obj-$(CONFIG_$(PHASE_)MISC) += misc-uclass.o |
| 7 | obj-$(CONFIG_$(PHASE_)NVMEM) += nvmem.o |
Simon Glass | 605931c | 2018-11-18 08:14:27 -0700 | [diff] [blame] | 8 | |
Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 9 | obj-$(CONFIG_$(PHASE_)CROS_EC) += cros_ec.o |
| 10 | obj-$(CONFIG_$(PHASE_)CROS_EC_SANDBOX) += cros_ec_sandbox.o |
| 11 | obj-$(CONFIG_$(PHASE_)CROS_EC_LPC) += cros_ec_lpc.o |
Simon Glass | 605931c | 2018-11-18 08:14:27 -0700 | [diff] [blame] | 12 | |
Simon Glass | 7ec2413 | 2024-09-29 19:49:48 -0600 | [diff] [blame] | 13 | ifndef CONFIG_XPL_BUILD |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 14 | obj-$(CONFIG_SANDBOX) += sandbox_adder.o |
Masahiro Yamada | 5594ce4 | 2013-10-17 17:34:57 +0900 | [diff] [blame] | 15 | obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o |
| 16 | obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 17 | obj-$(CONFIG_SANDBOX) += p2sb_sandbox.o p2sb_emul.o |
Simon Glass | 72231f7 | 2019-09-25 08:56:42 -0600 | [diff] [blame] | 18 | obj-$(CONFIG_SANDBOX) += swap_case.o |
Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 19 | endif |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 20 | |
Simon Glass | 86adc2e | 2024-09-29 19:49:53 -0600 | [diff] [blame] | 21 | ifdef CONFIG_$(XPL_)DM_I2C |
Simon Glass | 7ec2413 | 2024-09-29 19:49:48 -0600 | [diff] [blame] | 22 | ifndef CONFIG_XPL_BUILD |
Simon Glass | 45be32c | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 23 | obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o |
Marek Vasut | 16637b4 | 2022-04-10 06:27:14 +0200 | [diff] [blame] | 24 | obj-$(CONFIG_USB_HUB_USB251XB) += usb251xb.o |
Simon Glass | 45be32c | 2014-12-10 08:55:51 -0700 | [diff] [blame] | 25 | endif |
Simon Glass | c744fca | 2016-07-04 11:58:19 -0600 | [diff] [blame] | 26 | endif |
Simon Glass | 750c482 | 2016-07-04 11:58:01 -0600 | [diff] [blame] | 27 | ifdef CONFIG_SPL_OF_PLATDATA |
Simon Glass | 7ec2413 | 2024-09-29 19:49:48 -0600 | [diff] [blame] | 28 | ifdef CONFIG_XPL_BUILD |
Simon Glass | 750c482 | 2016-07-04 11:58:01 -0600 | [diff] [blame] | 29 | obj-$(CONFIG_SANDBOX) += spltest_sandbox.o |
| 30 | endif |
| 31 | endif |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 32 | obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o |
| 33 | obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o |
| 34 | obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o |
| 35 | obj-$(CONFIG_DS4510) += ds4510.o |
| 36 | obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o |
York Sun | 37562f6 | 2013-10-22 12:39:02 -0700 | [diff] [blame] | 37 | obj-$(CONFIG_FSL_IFC) += fsl_ifc.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 38 | obj-$(CONFIG_FSL_IIM) += fsl_iim.o |
gaurav rana | 9aaea44 | 2015-02-27 09:44:22 +0530 | [diff] [blame] | 39 | obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o |
Simon Glass | 86adc2e | 2024-09-29 19:49:53 -0600 | [diff] [blame] | 40 | obj-$(CONFIG_$(XPL_)FS_LOADER) += fs_loader.o |
Tim Harvey | b820460 | 2022-03-07 16:24:04 -0800 | [diff] [blame] | 41 | obj-$(CONFIG_GATEWORKS_SC) += gsc.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 42 | obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o |
| 43 | obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o |
Mario Six | 8862f45 | 2018-10-04 09:00:54 +0200 | [diff] [blame] | 44 | obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o |
Simon Glass | ff418d9 | 2019-12-06 21:41:58 -0700 | [diff] [blame] | 45 | obj-$(CONFIG_IRQ) += irq-uclass.o |
Simon Glass | e7995f7 | 2021-08-07 07:24:11 -0600 | [diff] [blame] | 46 | obj-$(CONFIG_SANDBOX) += irq_sandbox.o irq_sandbox_test.o |
Simon Glass | 86adc2e | 2024-09-29 19:49:53 -0600 | [diff] [blame] | 47 | obj-$(CONFIG_$(XPL_)I2C_EEPROM) += i2c_eeprom.o |
Mario Six | 1a9d43f | 2018-10-04 09:00:55 +0200 | [diff] [blame] | 48 | obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 49 | obj-$(CONFIG_IMX8) += imx8/ |
Peng Fan | d5c3183 | 2023-06-15 18:09:05 +0800 | [diff] [blame] | 50 | obj-$(CONFIG_IMX_ELE) += imx_ele/ |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 51 | obj-$(CONFIG_LED_STATUS) += status_led.o |
| 52 | obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o |
| 53 | obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o |
Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 54 | obj-$(CONFIG_$(PHASE_)LS2_SFP) += ls2_sfp.o |
Simon Glass | 86adc2e | 2024-09-29 19:49:53 -0600 | [diff] [blame] | 55 | obj-$(CONFIG_$(XPL_)MXC_OCOTP) += mxc_ocotp.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 56 | obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o |
Jim Liu | fab2eff | 2022-06-07 16:33:54 +0800 | [diff] [blame] | 57 | obj-$(CONFIG_NPCM_OTP) += npcm_otp.o |
Jim Liu | cce4eed | 2022-06-24 16:24:37 +0800 | [diff] [blame] | 58 | obj-$(CONFIG_NPCM_HOST) += npcm_host_intf.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 59 | obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o |
Simon Glass | 2ee1f6a | 2019-12-06 21:41:55 -0700 | [diff] [blame] | 60 | obj-$(CONFIG_P2SB) += p2sb-uclass.o |
Stefan Roese | 04b2275 | 2015-03-12 11:22:46 +0100 | [diff] [blame] | 61 | obj-$(CONFIG_PCA9551_LED) += pca9551_led.o |
Simon Glass | 86adc2e | 2024-09-29 19:49:53 -0600 | [diff] [blame] | 62 | obj-$(CONFIG_$(XPL_)PWRSEQ) += pwrseq-uclass.o |
Asherah Connor | 4ffa95d | 2021-03-19 18:21:40 +1100 | [diff] [blame] | 63 | ifdef CONFIG_QFW |
| 64 | obj-y += qfw.o |
Heinrich Schuchardt | d2cd3d6 | 2023-12-19 16:04:01 +0100 | [diff] [blame] | 65 | obj-$(CONFIG_QFW_ACPI) += qfw_acpi.o |
Asherah Connor | 4ffa95d | 2021-03-19 18:21:40 +1100 | [diff] [blame] | 66 | obj-$(CONFIG_QFW_PIO) += qfw_pio.o |
Asherah Connor | f0c0e54 | 2021-03-19 18:21:42 +1100 | [diff] [blame] | 67 | obj-$(CONFIG_QFW_MMIO) += qfw_mmio.o |
Heinrich Schuchardt | 08d931a | 2023-12-23 02:03:34 +0100 | [diff] [blame] | 68 | obj-$(CONFIG_QFW_SMBIOS) += qfw_smbios.o |
Asherah Connor | ab1975b | 2021-03-19 18:21:41 +1100 | [diff] [blame] | 69 | obj-$(CONFIG_SANDBOX) += qfw_sandbox.o |
Asherah Connor | 4ffa95d | 2021-03-19 18:21:40 +1100 | [diff] [blame] | 70 | endif |
Tom Rini | 97799bc | 2024-10-11 12:23:25 -0600 | [diff] [blame] | 71 | obj-$(CONFIG_$(PHASE_)ROCKCHIP_EFUSE) += rockchip-efuse.o |
| 72 | obj-$(CONFIG_$(PHASE_)ROCKCHIP_OTP) += rockchip-otp.o |
Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 73 | obj-$(CONFIG_$(PHASE_)ROCKCHIP_IODOMAIN) += rockchip-io-domain.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 74 | obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o |
Pragnesh Patel | 6e9661f | 2020-05-29 11:33:21 +0530 | [diff] [blame] | 75 | obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 76 | obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o |
| 77 | obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o |
Patrick Delaunay | 0c4656b | 2018-05-17 15:24:06 +0200 | [diff] [blame] | 78 | obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 79 | obj-$(CONFIG_STM32_RCC) += stm32_rcc.o |
Ahmed Mansour | aa270b4 | 2017-12-15 16:01:00 -0500 | [diff] [blame] | 80 | obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 81 | obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o |
| 82 | obj-$(CONFIG_TEGRA_CAR) += tegra_car.o |
Simon Glass | 4bf8972 | 2020-12-23 08:11:18 -0700 | [diff] [blame] | 83 | obj-$(CONFIG_TEST_DRV) += test_drv.o |
Simon Glass | 4cafa21 | 2024-09-29 19:49:54 -0600 | [diff] [blame] | 84 | obj-$(CONFIG_$(PHASE_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 85 | obj-$(CONFIG_TWL4030_LED) += twl4030_led.o |
Liviu Dudau | 688db7f | 2018-09-28 13:43:31 +0100 | [diff] [blame] | 86 | obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o |
Mario Six | bceb7bc | 2018-10-04 09:00:53 +0200 | [diff] [blame] | 87 | obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o |
Paul Burton | 738d8a8 | 2018-12-16 19:25:19 -0300 | [diff] [blame] | 88 | obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o |
Eugen Hristev | 3bd5610 | 2019-10-09 09:23:39 +0000 | [diff] [blame] | 89 | obj-$(CONFIG_MICROCHIP_FLEXCOM) += microchip_flexcom.o |
Tero Kristo | 887dde5 | 2019-10-24 15:00:46 +0530 | [diff] [blame] | 90 | obj-$(CONFIG_K3_AVS0) += k3_avs.o |
Tero Kristo | f81f4cd | 2020-02-14 11:18:15 +0200 | [diff] [blame] | 91 | obj-$(CONFIG_ESM_K3) += k3_esm.o |
Tero Kristo | 1444e11 | 2020-02-14 11:18:16 +0200 | [diff] [blame] | 92 | obj-$(CONFIG_ESM_PMIC) += esm_pmic.o |
Michael Walle | 2184cc6 | 2022-02-25 18:06:24 +0530 | [diff] [blame] | 93 | obj-$(CONFIG_SL28CPLD) += sl28cpld.o |
Wan Yee Lau | 80db98c | 2024-03-28 14:24:00 +0800 | [diff] [blame] | 94 | obj-$(CONFIG_SPL_SOCFPGA_DT_REG) += socfpga_dtreg.o |