| Priyanka Jain | fd45ca0 | 2018-11-28 13:04:27 +0000 | [diff] [blame] | 1 | Overview |
| 2 | -------- |
| 3 | The LX2160A Reference Design (RDB) is a high-performance computing, |
| 4 | evaluation, and development platform that supports the QorIQ LX2160A |
| 5 | Layerscape Architecture processor and its personalities. |
| 6 | |
| 7 | LX2160A SoC Overview |
| 8 | -------------------------------------- |
| 9 | For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc |
| 10 | |
| 11 | LX2160ARDB board Overview |
| 12 | ---------------------- |
| 13 | DDR Memory |
| 14 | Two ports of 72-bits (8-bits ECC) DDR4. |
| 15 | Each port supports four chip-selects and two DIMM |
| 16 | connectors. Data rate upto 3.2 GT/s. |
| 17 | |
| 18 | SERDES ports |
| 19 | Thress serdes controllers (24 lanes) |
| 20 | Serdes1: Supports two USXGMII connectors, each connected through |
| 21 | Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi |
| 22 | IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi |
| 23 | CS4223 phy. |
| 24 | |
| 25 | Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0 |
| 26 | connectors |
| 27 | |
| 28 | Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector |
| 29 | |
| 30 | eSDHC |
| 31 | eSDHC1: Supports a SD connector for connecting SD cards |
| 32 | eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC |
| 33 | |
| 34 | Octal SPI (XSPI) |
| 35 | Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator |
| 36 | for off-board emulation |
| 37 | |
| 38 | I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer |
| 39 | Serial Ports |
| 40 | |
| 41 | USB 3.0 |
| 42 | Two high speed USB 3.0 ports. First USB 3.0 port configured as |
| 43 | Host with Type-A connector, second USB 3.0 port configured as OTG |
| 44 | with micro-AB connector |
| 45 | |
| 46 | Serial Ports Two UART ports |
| 47 | Ethernet Two RGMII interfaces |
| 48 | Debug ARM JTAG support |
| 49 | |
| 50 | Booting Options |
| 51 | --------------- |
| 52 | a) Flexspi boot |
| 53 | b) SD boot |
| 54 | |
| 55 | Memory map for Flexspi flash |
| 56 | ---------------------------- |
| 57 | Image Flash Offset |
| 58 | bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000 |
| 59 | fip.bin (bl31 + bl33(u-boot) + |
| 60 | header for Secure-boot(secure-boot only)) 0x00100000 |
| 61 | Boot firmware Environment 0x00500000 |
| 62 | DDR PHY Firmware (fip_ddr_all.bin) 0x00800000 |
| 63 | DPAA2 MC Firmware 0x00A00000 |
| 64 | DPAA2 DPL 0x00D00000 |
| 65 | DPAA2 DPC 0x00E00000 |
| 66 | Kernel.itb 0x01000000 |
| 67 | |
| 68 | Memory map for sd card |
| 69 | ---------------------------- |
| 70 | Image SD card Offset |
| 71 | bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008 |
| 72 | fip.bin (bl31 + bl33(u-boot) + |
| 73 | header for Secure-boot(secure-boot only)) 0x00800 |
| 74 | Boot firmware Environment 0x02800 |
| 75 | DDR PHY Firmware (fip_ddr_all.bin) 0x04000 |
| 76 | DPAA2 MC Firmware 0x05000 |
| 77 | DPAA2 DPL 0x06800 |
| 78 | DPAA2 DPC 0x07000 |
| 79 | Kernel.itb 0x08000 |
| Pankaj Bansal | 338baa3 | 2019-02-08 10:29:58 +0000 | [diff] [blame] | 80 | |
| 81 | LX2160AQDS board Overview |
| 82 | ---------------------- |
| 83 | Various Mezzanine cards and their connection for different SERDES protocols is |
| 84 | as below: |
| 85 | |
| 86 | SERDES1 |CARDS |
| 87 | ----------------------------------------------------------------------- |
| 88 | 1 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 89 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 90 | |Connect I/O cable to IO_SLOT1(J110) |
| 91 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 92 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 93 | |Connect I/O cable to IO_SLOT2(J113) |
| 94 | ------------------------------------------------------------------------ |
| 95 | 3 |Mezzanine:X-M11-USXGMII (29828) |
| 96 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 97 | |Connect I/O cable to IO_SLOT1(J110) |
| 98 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 99 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 100 | |Connect I/O cable to IO_SLOT2(J113) |
| 101 | ------------------------------------------------------------------------ |
| 102 | 7 |Mezzanine:X-M11-USXGMII (29828) |
| 103 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 104 | |Connect I/O cable to IO_SLOT1(J110) |
| 105 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 106 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 107 | |Connect I/O cable to IO_SLOT2(J113) |
| 108 | ------------------------------------------------------------------------ |
| 109 | 8 |Mezzanine:X-M12-XFI (29829) |
| 110 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 111 | |Connect I/O cable to IO_SLOT1(J110) |
| 112 | |Mezzanine:X-M12-XFI (29829) |
| 113 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 114 | |Connect I/O cable to IO_SLOT2(J113) |
| 115 | ------------------------------------------------------------------------ |
| 116 | 13 |Mezzanine:X-M8-100G (29734) |
| 117 | |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) |
| 118 | |Connect I/O cable to IO_SLOT1(J110) |
| 119 | |Mezzanine:X-M8-100G (29734) |
| 120 | |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT2(J111) |
| 121 | |Connect I/O cable to IO_SLOT2(J113) |
| 122 | ------------------------------------------------------------------------ |
| 123 | 15 |Mezzanine:X-M8-100G (29734) |
| 124 | |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) |
| 125 | |Connect I/O cable to IO_SLOT1(J110) |
| 126 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 127 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 128 | |Connect I/O cable to IO_SLOT2(J113) |
| 129 | ------------------------------------------------------------------------ |
| 130 | 17 |Mezzanine:X-M13-25G (32133) |
| 131 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 132 | |Connect I/O cable to IO_SLOT1(J110) |
| 133 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 134 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT2 (J111) |
| 135 | |Connect I/O cable to IO_SLOT2(J113) |
| 136 | ------------------------------------------------------------------------ |
| 137 | 19 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133) |
| 138 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 139 | |Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125) |
| 140 | |Mezzanine:X-M7-40G (29738) |
| 141 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111) |
| 142 | |Connect I/O cable to IO_SLOT2(J113) |
| 143 | ------------------------------------------------------------------------ |
| 144 | 20 |Mezzanine:X-M7-40G (29738) |
| 145 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) |
| 146 | |Connect I/O cable to IO_SLOT1(J108) |
| 147 | |Mezzanine:X-M7-40G (29738) |
| 148 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT2 (J111) |
| 149 | |Connect I/O cable to IO_SLOT2(J113) |
| 150 | ------------------------------------------------------------------------ |
| 151 | |
| 152 | |
| 153 | SERDES2 |CARDS |
| 154 | ----------------------------------------------------------------------- |
| 155 | 2 |Mezzanine:X-M6-PCIE-X8 (29737) * |
| 156 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 157 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117) |
| 158 | |Connect I/O cable to IO_SLOT3(J116) |
| 159 | ------------------------------------------------------------------------ |
| 160 | 3 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 161 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 162 | |Connect I/O cable to IO_SLOT3(J116) |
| 163 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 164 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 165 | |Connect I/O cable to IO_SLOT4(J119) |
| 166 | ------------------------------------------------------------------------ |
| 167 | 5 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 168 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 169 | |Connect I/O cable to IO_SLOT3(J116) |
| 170 | |Mezzanine:X-M5-SATA (29687) |
| 171 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 172 | |Connect I/O cable to IO_SLOT4(J119) |
| 173 | ------------------------------------------------------------------------ |
| 174 | 11 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 175 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 176 | |Connect I/O cable to IO_SLOT7(J127) |
| 177 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 178 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 179 | |Connect I/O cable to IO_SLOT8(J131) |
| 180 | ------------------------------------------------------------------------ |
| 181 | |
| 182 | |
| 183 | SERDES3 |CARDS |
| 184 | ----------------------------------------------------------------------- |
| 185 | 2 |Mezzanine:X-M6-PCIE-X8 (29737) * |
| 186 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120) |
| 187 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT6 (J123) |
| 188 | |Connect I/O cable to IO_SLOT5(J122) |
| 189 | ------------------------------------------------------------------------- |
| 190 | 3 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 191 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT5 (J120) |
| 192 | |Connect I/O cable to IO_SLOT5(J122) |
| 193 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 194 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT6 (J123) |
| 195 | |Connect I/O cable to IO_SLOT6(J125) |
| 196 | ------------------------------------------------------------------------- |
| 197 | |
| Meenakshi Aggarwal | 8a03b0d | 2020-12-04 20:17:28 +0530 | [diff] [blame] | 198 | LX2162A SoC Overview |
| 199 | -------------------------------------- |
| 200 | For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc |
| 201 | |
| 202 | LX2162AQDS board Overview |
| 203 | ---------------------- |
| 204 | DDR Memory |
| 205 | One ports of 72-bits (8-bits ECC) DDR4. |
| 206 | Each port supports four chip-selects and two DIMM |
| 207 | connectors. Data rate upto 2.9 GT/s. |
| 208 | |
| 209 | SERDES ports |
| 210 | Two serdes controllers (12 lanes) |
| 211 | Serdes1: Supports two USXGMII connectors, each connected through |
| 212 | Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi |
| 213 | IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi |
| 214 | CS4223 phy. |
| 215 | |
| 216 | Serdes2: Supports two PCIe x4 (Gen3) and one PCIe x8 (Gen3) connector, |
| 217 | four SATA 3.0 connectors |
| 218 | |
| 219 | eSDHC |
| 220 | eSDHC1: Supports a SD connector for connecting SD cards |
| 221 | eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC |
| 222 | |
| 223 | Octal SPI (XSPI) |
| 224 | Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator |
| 225 | for off-board emulation |
| 226 | |
| 227 | I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer |
| 228 | Serial Ports |
| 229 | |
| 230 | USB 3.0 |
| 231 | One high speed USB 3.0 ports. First USB 3.0 port configured as Host |
| 232 | with Type-A connector, second USB 3.0 port configured as OTG with |
| 233 | micro-AB connector |
| 234 | |
| 235 | Serial Ports Two UART ports |
| 236 | Ethernet Two RGMII interfaces |
| 237 | Debug ARM JTAG support |
| 238 | |
| 239 | Booting Options |
| 240 | --------------- |
| 241 | a) Flexspi boot |
| 242 | b) SD boot |
| 243 | c) eMMC boot |
| 244 | |
| 245 | Memory map for Flexspi flash |
| 246 | ---------------------------- |
| 247 | Image Flash Offset |
| 248 | bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000 |
| 249 | fip.bin (bl31 + bl33(u-boot) + |
| 250 | header for Secure-boot(secure-boot only)) 0x00100000 |
| 251 | Boot firmware Environment 0x00500000 |
| 252 | DDR PHY Firmware (fip_ddr_all.bin) 0x00800000 |
| 253 | DPAA2 MC Firmware 0x00A00000 |
| 254 | DPAA2 DPL 0x00D00000 |
| 255 | DPAA2 DPC 0x00E00000 |
| 256 | Kernel.itb 0x01000000 |
| 257 | |
| 258 | Memory map for sd/eMMC card |
| 259 | ---------------------------- |
| 260 | Image SD/eMMC card Offset |
| 261 | bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008 |
| 262 | fip.bin (bl31 + bl33(u-boot) + |
| 263 | header for Secure-boot(secure-boot only)) 0x00800 |
| 264 | Boot firmware Environment 0x02800 |
| 265 | DDR PHY Firmware (fip_ddr_all.bin) 0x04000 |
| 266 | DPAA2 MC Firmware 0x05000 |
| 267 | DPAA2 DPL 0x06800 |
| 268 | DPAA2 DPC 0x07000 |
| 269 | Kernel.itb 0x08000 |
| 270 | |
| 271 | Various Mezzanine cards and their connection for different SERDES protocols is |
| 272 | as below: |
| 273 | |
| 274 | SERDES1 |CARDS |
| 275 | ----------------------------------------------------------------------- |
| 276 | 1 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 277 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 278 | |Connect I/O cable to IO_SLOT1(J110) |
| 279 | ------------------------------------------------------------------------ |
| 280 | 3 |Mezzanine:X-M11-USXGMII (29828) |
| 281 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 282 | |Connect I/O cable to IO_SLOT1(J110) |
| 283 | ------------------------------------------------------------------------ |
| 284 | 15 |Mezzanine:X-M8-50G (29734) |
| 285 | |Connect Hydra Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) |
| 286 | |Connect I/O cable to IO_SLOT1(J110) |
| 287 | ------------------------------------------------------------------------ |
| 288 | 17 |Mezzanine:X-M13-25G (32133) |
| 289 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 290 | |Connect I/O cable to IO_SLOT1(J110) |
| 291 | ------------------------------------------------------------------------ |
| 292 | 18 |Mezzanine:X-M11-USXGMII (29828), X-M13-25G (32133) |
| 293 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT1 (J108) |
| 294 | |Connect M11 I/O cable to IO_SLOT1(J110), M13 I/O cable to IO_SLOT6(J125) |
| 295 | ------------------------------------------------------------------------ |
| 296 | 20 |Mezzanine:X-M7-40G (29738) |
| 297 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT1 (J108) |
| 298 | |Connect I/O cable to IO_SLOT1(J108) |
| 299 | ------------------------------------------------------------------------ |
| 300 | |
| 301 | |
| 302 | SERDES2 |CARDS |
| 303 | ----------------------------------------------------------------------- |
| 304 | 2 |Mezzanine:X-M6-PCIE-X8 (29737) * |
| 305 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 306 | |Connect Straight Cable (HDR-198816-XX-ECUE) to SD_SLOT4 (J117) |
| 307 | |Connect I/O cable to IO_SLOT3(J116) |
| 308 | ------------------------------------------------------------------------ |
| 309 | 3 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 310 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 311 | |Connect I/O cable to IO_SLOT3(J116) |
| 312 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 313 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 314 | |Connect I/O cable to IO_SLOT4(J119) |
| 315 | ------------------------------------------------------------------------ |
| 316 | 5 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 317 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 318 | |Connect I/O cable to IO_SLOT3(J116) |
| 319 | |Mezzanine:X-M5-SATA (29687) |
| 320 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 321 | |Connect I/O cable to IO_SLOT4(J119) |
| 322 | ------------------------------------------------------------------------ |
| 323 | 11 |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 324 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT3 (J114) |
| 325 | |Connect I/O cable to IO_SLOT7(J127) |
| 326 | |Mezzanine:X-M4-PCIE-SGMII (29733) |
| 327 | |Connect Hydra Cable (HDR-198564-01-ECUE) to SD_SLOT4 (J117) |
| 328 | |Connect I/O cable to IO_SLOT8(J131) |
| 329 | ------------------------------------------------------------------------ |