blob: 31d315d5fdd247b3e09f3185c0af1326a12a9712 [file] [log] [blame]
Pragnesh Patele00653c2020-05-29 11:33:35 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2019 SiFive, Inc
4 *
5 * Authors:
6 * Pragnesh Patel <pragnesh.patel@sifive.com>
7 */
8
9#include <init.h>
10#include <spl.h>
11#include <misc.h>
12#include <log.h>
13#include <linux/delay.h>
14#include <asm/gpio.h>
15#include <asm/arch/gpio.h>
16#include <asm/arch/spl.h>
17
18#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
19
Bin Mengdb283f72020-08-02 23:09:02 -070020int spl_board_init_f(void)
Pragnesh Patele00653c2020-05-29 11:33:35 +053021{
22 int ret;
23
24 ret = soc_spl_init();
25 if (ret) {
26 debug("FU540 SPL init failed: %d\n", ret);
27 return ret;
28 }
29
30 /*
31 * GEMGXL init VSC8541 PHY reset sequence;
32 * leave pull-down active for 2ms
33 */
34 udelay(2000);
35 ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
36 if (ret) {
37 debug("gem_phy_reset gpio request failed: %d\n", ret);
38 return ret;
39 }
40
41 /* Set GPIO 12 (PHY NRESET) */
42 ret = gpio_direction_output(GEM_PHY_RESET, 1);
43 if (ret) {
44 debug("gem_phy_reset gpio direction set failed: %d\n", ret);
45 return ret;
46 }
47
48 udelay(1);
49
50 /* Reset PHY again to enter unmanaged mode */
51 gpio_set_value(GEM_PHY_RESET, 0);
52 udelay(1);
53 gpio_set_value(GEM_PHY_RESET, 1);
54 mdelay(15);
55
56 return 0;
57}