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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kumar Galac5651892006-01-12 19:51:38 -06002/*
Kim Phillips57a2af32009-07-18 18:42:13 -05003 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
Kumar Galac5651892006-01-12 19:51:38 -06004 */
5
Simon Glass18afe102019-11-14 12:57:47 -07006#include <init.h>
Kumar Galac5651892006-01-12 19:51:38 -06007#include <asm/mmu.h>
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -07008#include <asm/io.h>
Kumar Galac5651892006-01-12 19:51:38 -06009#include <common.h>
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070010#include <mpc83xx.h>
Kumar Galac5651892006-01-12 19:51:38 -060011#include <pci.h>
Kumar Galac5651892006-01-12 19:51:38 -060012#include <i2c.h>
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070013#include <asm/fsl_i2c.h>
Simon Glassdbd79542020-05-10 11:40:11 -060014#include <linux/delay.h>
Kumar Galac5651892006-01-12 19:51:38 -060015
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070016static struct pci_region pci1_regions[] = {
17 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020018 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
19 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
20 size: CONFIG_SYS_PCI1_MEM_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070021 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
22 },
23 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020024 bus_start: CONFIG_SYS_PCI1_IO_BASE,
25 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
26 size: CONFIG_SYS_PCI1_IO_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070027 flags: PCI_REGION_IO
28 },
29 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020030 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
31 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
32 size: CONFIG_SYS_PCI1_MMIO_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070033 flags: PCI_REGION_MEM
Kumar Galac5651892006-01-12 19:51:38 -060034 },
Kumar Galac5651892006-01-12 19:51:38 -060035};
Kumar Galac5651892006-01-12 19:51:38 -060036
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070037#ifdef CONFIG_MPC83XX_PCI2
38static struct pci_region pci2_regions[] = {
39 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040 bus_start: CONFIG_SYS_PCI2_MEM_BASE,
41 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
42 size: CONFIG_SYS_PCI2_MEM_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070043 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
44 },
45 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046 bus_start: CONFIG_SYS_PCI2_IO_BASE,
47 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
48 size: CONFIG_SYS_PCI2_IO_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070049 flags: PCI_REGION_IO
50 },
51 {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052 bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
53 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
54 size: CONFIG_SYS_PCI2_MMIO_SIZE,
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070055 flags: PCI_REGION_MEM
56 },
Kumar Galac5651892006-01-12 19:51:38 -060057};
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070058#endif
Kumar Galac5651892006-01-12 19:51:38 -060059
Ira W. Snyder4adfd022008-08-22 11:00:15 -070060#ifndef CONFIG_PCISLAVE
Ira W. Snyder0da3a3d2008-08-22 11:00:13 -070061void pib_init(void)
Kumar Galac5651892006-01-12 19:51:38 -060062{
Ben Warrenc8135502006-09-12 10:15:53 -040063 u8 val8, orig_i2c_bus;
Kumar Galac5651892006-01-12 19:51:38 -060064 /*
65 * Assign PIB PMC slot to desired PCI bus
66 */
Ben Warrenc8135502006-09-12 10:15:53 -040067 /* Switch temporarily to I2C bus #2 */
68 orig_i2c_bus = i2c_get_bus_num();
Wolfgang Denk87b3d4b2006-11-30 18:02:20 +010069 i2c_set_bus_num(1);
Kumar Galac5651892006-01-12 19:51:38 -060070
71 val8 = 0;
72 i2c_write(0x23, 0x6, 1, &val8, 1);
73 i2c_write(0x23, 0x7, 1, &val8, 1);
74 val8 = 0xff;
75 i2c_write(0x23, 0x2, 1, &val8, 1);
76 i2c_write(0x23, 0x3, 1, &val8, 1);
77
78 val8 = 0;
79 i2c_write(0x26, 0x6, 1, &val8, 1);
80 val8 = 0x34;
81 i2c_write(0x26, 0x7, 1, &val8, 1);
Mario Six258312f2019-01-21 09:17:51 +010082#if defined(CONFIG_PCI_64BIT)
Kumar Galac5651892006-01-12 19:51:38 -060083 val8 = 0xf4; /* PMC2:PCI1/64-bit */
Mario Six258312f2019-01-21 09:17:51 +010084#elif defined(CONFIG_PCI_ALL_PCI1)
Kumar Galac5651892006-01-12 19:51:38 -060085 val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
Mario Six258312f2019-01-21 09:17:51 +010086#elif defined(CONFIG_PCI_ONE_PCI1)
Kumar Galac5651892006-01-12 19:51:38 -060087 val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
88#else
89 val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
90#endif
91 i2c_write(0x26, 0x2, 1, &val8, 1);
92 val8 = 0xff;
93 i2c_write(0x26, 0x3, 1, &val8, 1);
94 val8 = 0;
95 i2c_write(0x27, 0x6, 1, &val8, 1);
96 i2c_write(0x27, 0x7, 1, &val8, 1);
97 val8 = 0xff;
98 i2c_write(0x27, 0x2, 1, &val8, 1);
99 val8 = 0xef;
100 i2c_write(0x27, 0x3, 1, &val8, 1);
101 asm("eieio");
102
Mario Six258312f2019-01-21 09:17:51 +0100103#if defined(CONFIG_PCI_64BIT)
Kumar Galac5651892006-01-12 19:51:38 -0600104 printf("PCI1: 64-bit on PMC2\n");
Mario Six258312f2019-01-21 09:17:51 +0100105#elif defined(CONFIG_PCI_ALL_PCI1)
Kumar Galac5651892006-01-12 19:51:38 -0600106 printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
Mario Six258312f2019-01-21 09:17:51 +0100107#elif defined(CONFIG_PCI_ONE_PCI1)
Kumar Galac5651892006-01-12 19:51:38 -0600108 printf("PCI1: 32-bit on PMC1\n");
109 printf("PCI2: 32-bit on PMC2, PMC3\n");
110#else
111 printf("PCI1: 32-bit on PMC1, PMC2\n");
112 printf("PCI2: 32-bit on PMC3\n");
113#endif
Ben Warrenc8135502006-09-12 10:15:53 -0400114 /* Reset to original I2C bus */
Timur Tabiab347542006-11-03 19:15:00 -0600115 i2c_set_bus_num(orig_i2c_bus);
Kumar Galac5651892006-01-12 19:51:38 -0600116}
117
Ira W. Snyder4adfd022008-08-22 11:00:15 -0700118#endif /* CONFIG_PCISLAVE */