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git01.mediatek.com / filogic / uboot / db09c5fcc246b235877e6235c2c769579e9fdb06 / . / board / cogent / u-boot.lds.debug
blob: e88bd977d9ec82245c03fcd978952b8ccf2a0a35 [file] [log] [blame]
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]25/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
31 .interp : { *(.interp) }
32 .hash : { *(.hash) }
33 .dynsym : { *(.dynsym) }
34 .dynstr : { *(.dynstr) }
35 .rel.text : { *(.rel.text) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]36 .rela.text : { *(.rela.text) }
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]37 .rel.data : { *(.rel.data) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]38 .rela.data : { *(.rela.data) }
39 .rel.rodata : { *(.rel.rodata) }
40 .rela.rodata : { *(.rela.rodata) }
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]41 .rel.got : { *(.rel.got) }
42 .rela.got : { *(.rela.got) }
43 .rel.ctors : { *(.rel.ctors) }
44 .rela.ctors : { *(.rela.ctors) }
45 .rel.dtors : { *(.rel.dtors) }
46 .rela.dtors : { *(.rela.dtors) }
47 .rel.bss : { *(.rel.bss) }
48 .rela.bss : { *(.rela.bss) }
49 .rel.plt : { *(.rel.plt) }
50 .rela.plt : { *(.rela.plt) }
51 .init : { *(.init) }
52 .plt : { *(.plt) }
53 .text :
54 {
55 /* WARNING - the following is hand-optimized to fit within */
56 /* the sector layout of our flash chips! XXX FIXME XXX */
57
Stefan Roese88fbf932010-04-15 16:07:28 +0200[diff] [blame]58 arch/powerpc/cpu/mpc8xx/start.o (.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]59 common/dlmalloc.o (.text)
Peter Tyser685b7f52010-04-12 22:28:05 -0500[diff] [blame]60 lib/vsprintf.o (.text)
61 lib/crc32.o (.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]62
63 . = env_offset;
Jean-Christophe PLAGNIOL-VILLARD4436c1e2008-09-10 22:48:01 +0200[diff] [blame]64 common/env_embedded.o(.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]65
66 *(.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]67 *(.got1)
68 }
69 _etext = .;
70 PROVIDE (etext = .);
71 .rodata :
72 {
73 *(.rodata)
74 *(.rodata1)
Wolfgang Denkaaa7c002005-12-12 16:06:05 +0100[diff] [blame]75 *(.rodata.str1.4)
76 *(.eh_frame)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]77 }
78 .fini : { *(.fini) } =0
79 .ctors : { *(.ctors) }
80 .dtors : { *(.dtors) }
81
82 /* Read-write section, merged into data segment: */
83 . = (. + 0x0FFF) & 0xFFFFF000;
84 _erotext = .;
85 PROVIDE (erotext = .);
86 .reloc :
87 {
88 *(.got)
89 _GOT2_TABLE_ = .;
90 *(.got2)
91 _FIXUP_TABLE_ = .;
92 *(.fixup)
93 }
94 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
95 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
96
97 .data :
98 {
99 *(.data)
100 *(.data1)
101 *(.sdata)
102 *(.sdata2)
103 *(.dynamic)
104 CONSTRUCTORS
105 }
106 _edata = .;
107 PROVIDE (edata = .);
108
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]109
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]110 . = ALIGN(4);
111 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]112 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]113 }
114
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]115
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]116 __start___ex_table = .;
117 __ex_table : { *(__ex_table) }
118 __stop___ex_table = .;
119
120 . = ALIGN(4096);
121 __init_begin = .;
122 .text.init : { *(.text.init) }
123 .data.init : { *(.data.init) }
124 . = ALIGN(4096);
125 __init_end = .;
126
127 __bss_start = .;
128 .bss :
129 {
130 *(.sbss) *(.scommon)
131 *(.dynbss)
132 *(.bss)
133 *(COMMON)
134 }
Po-Yu Chuangcedbf4b2011-03-01 22:59:59 +0000[diff] [blame]135 __bss_end__ = . ;
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]136 PROVIDE (end = .);
137}