Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 8 | #include <clk.h> |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 9 | #include <dm.h> |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 10 | #include <serial.h> |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 11 | #include <watchdog.h> |
| 12 | #include <asm/io.h> |
Toshifumi NISHINAGA | 65bfb9c | 2016-07-08 01:02:24 +0900 | [diff] [blame] | 13 | #include <asm/arch/stm32.h> |
Patrice Chotard | 9e27650 | 2018-01-12 09:23:49 +0100 | [diff] [blame] | 14 | #include "serial_stm32.h" |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 15 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 16 | static void _stm32_serial_setbrg(fdt_addr_t base, |
| 17 | struct stm32_uart_info *uart_info, |
| 18 | u32 clock_rate, |
| 19 | int baudrate) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 20 | { |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 21 | bool stm32f4 = uart_info->stm32f4; |
Patrice Chotard | 4809a19 | 2017-07-18 09:29:08 +0200 | [diff] [blame] | 22 | u32 int_div, mantissa, fraction, oversampling; |
Toshifumi NISHINAGA | 65bfb9c | 2016-07-08 01:02:24 +0900 | [diff] [blame] | 23 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 24 | int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 25 | |
| 26 | if (int_div < 16) { |
| 27 | oversampling = 8; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 28 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 29 | } else { |
| 30 | oversampling = 16; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 31 | clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); |
Patrice Chotard | 3149632 | 2017-06-08 09:26:55 +0200 | [diff] [blame] | 32 | } |
| 33 | |
| 34 | mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT; |
| 35 | fraction = int_div % oversampling; |
| 36 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 37 | writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 38 | } |
| 39 | |
| 40 | static int stm32_serial_setbrg(struct udevice *dev, int baudrate) |
| 41 | { |
| 42 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 43 | |
| 44 | _stm32_serial_setbrg(plat->base, plat->uart_info, |
| 45 | plat->clock_rate, baudrate); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 46 | |
| 47 | return 0; |
| 48 | } |
| 49 | |
| 50 | static int stm32_serial_getc(struct udevice *dev) |
| 51 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 52 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 53 | bool stm32f4 = plat->uart_info->stm32f4; |
| 54 | fdt_addr_t base = plat->base; |
Patrice Chotard | 24af24b | 2018-04-20 08:59:06 +0200 | [diff] [blame] | 55 | u32 isr = readl(base + ISR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 56 | |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 57 | if ((isr & USART_ISR_RXNE) == 0) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 58 | return -EAGAIN; |
| 59 | |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 60 | if (isr & (USART_ISR_ORE)) { |
Patrice Chotard | 24af24b | 2018-04-20 08:59:06 +0200 | [diff] [blame] | 61 | if (!stm32f4) |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 62 | setbits_le32(base + ICR_OFFSET, USART_ICR_ORECF); |
Patrice Chotard | 24af24b | 2018-04-20 08:59:06 +0200 | [diff] [blame] | 63 | else |
| 64 | readl(base + RDR_OFFSET(stm32f4)); |
| 65 | return -EIO; |
| 66 | } |
| 67 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 68 | return readl(base + RDR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 69 | } |
| 70 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 71 | static int _stm32_serial_putc(fdt_addr_t base, |
| 72 | struct stm32_uart_info *uart_info, |
| 73 | const char c) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 74 | { |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 75 | bool stm32f4 = uart_info->stm32f4; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 76 | |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 77 | if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0) |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 78 | return -EAGAIN; |
| 79 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 80 | writel(c, base + TDR_OFFSET(stm32f4)); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 81 | |
| 82 | return 0; |
| 83 | } |
| 84 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 85 | static int stm32_serial_putc(struct udevice *dev, const char c) |
| 86 | { |
| 87 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 88 | |
| 89 | return _stm32_serial_putc(plat->base, plat->uart_info, c); |
| 90 | } |
| 91 | |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 92 | static int stm32_serial_pending(struct udevice *dev, bool input) |
| 93 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 94 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
| 95 | bool stm32f4 = plat->uart_info->stm32f4; |
| 96 | fdt_addr_t base = plat->base; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 97 | |
| 98 | if (input) |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 99 | return readl(base + ISR_OFFSET(stm32f4)) & |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 100 | USART_ISR_RXNE ? 1 : 0; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 101 | else |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 102 | return readl(base + ISR_OFFSET(stm32f4)) & |
Patrice Chotard | db0536e | 2018-05-17 14:50:43 +0200 | [diff] [blame^] | 103 | USART_ISR_TXE ? 0 : 1; |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 104 | } |
| 105 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 106 | static void _stm32_serial_init(fdt_addr_t base, |
| 107 | struct stm32_uart_info *uart_info) |
| 108 | { |
| 109 | bool stm32f4 = uart_info->stm32f4; |
| 110 | u8 uart_enable_bit = uart_info->uart_enable_bit; |
| 111 | |
| 112 | /* Disable uart-> enable fifo -> enable uart */ |
| 113 | clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | |
| 114 | BIT(uart_enable_bit)); |
| 115 | if (uart_info->has_fifo) |
| 116 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); |
| 117 | setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | |
| 118 | BIT(uart_enable_bit)); |
| 119 | } |
| 120 | |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 121 | static int stm32_serial_probe(struct udevice *dev) |
| 122 | { |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 123 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
Patrice Chotard | 21aad13 | 2017-09-27 15:44:53 +0200 | [diff] [blame] | 124 | struct clk clk; |
Patrice Chotard | 21aad13 | 2017-09-27 15:44:53 +0200 | [diff] [blame] | 125 | int ret; |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 126 | |
| 127 | plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 128 | |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 129 | ret = clk_get_by_index(dev, 0, &clk); |
| 130 | if (ret < 0) |
| 131 | return ret; |
| 132 | |
| 133 | ret = clk_enable(&clk); |
| 134 | if (ret) { |
| 135 | dev_err(dev, "failed to enable clock\n"); |
| 136 | return ret; |
| 137 | } |
Vikas Manocha | 7b00ff9 | 2017-02-12 10:25:46 -0800 | [diff] [blame] | 138 | |
Patrice Chotard | 4809a19 | 2017-07-18 09:29:08 +0200 | [diff] [blame] | 139 | plat->clock_rate = clk_get_rate(&clk); |
| 140 | if (plat->clock_rate < 0) { |
| 141 | clk_disable(&clk); |
| 142 | return plat->clock_rate; |
| 143 | }; |
| 144 | |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 145 | _stm32_serial_init(plat->base, plat->uart_info); |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 150 | static const struct udevice_id stm32_serial_id[] = { |
Patrice Chotard | b21a69a | 2017-09-27 15:44:52 +0200 | [diff] [blame] | 151 | { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info}, |
Patrice Chotard | 24fc72d | 2017-09-27 15:44:51 +0200 | [diff] [blame] | 152 | { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info}, |
| 153 | { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info}, |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 154 | {} |
| 155 | }; |
| 156 | |
| 157 | static int stm32_serial_ofdata_to_platdata(struct udevice *dev) |
| 158 | { |
| 159 | struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 160 | |
Patrice Chotard | 5011e6f | 2017-09-27 15:44:50 +0200 | [diff] [blame] | 161 | plat->base = devfdt_get_addr(dev); |
| 162 | if (plat->base == FDT_ADDR_T_NONE) |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 163 | return -EINVAL; |
| 164 | |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 165 | return 0; |
| 166 | } |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 167 | |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 168 | static const struct dm_serial_ops stm32_serial_ops = { |
| 169 | .putc = stm32_serial_putc, |
| 170 | .pending = stm32_serial_pending, |
| 171 | .getc = stm32_serial_getc, |
| 172 | .setbrg = stm32_serial_setbrg, |
| 173 | }; |
| 174 | |
| 175 | U_BOOT_DRIVER(serial_stm32) = { |
Patrice Chotard | 9e27650 | 2018-01-12 09:23:49 +0100 | [diff] [blame] | 176 | .name = "serial_stm32", |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 177 | .id = UCLASS_SERIAL, |
Vikas Manocha | 19e22c6 | 2017-02-12 10:25:44 -0800 | [diff] [blame] | 178 | .of_match = of_match_ptr(stm32_serial_id), |
| 179 | .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata), |
| 180 | .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata), |
Vikas Manocha | 5dba05e | 2016-02-11 15:47:19 -0800 | [diff] [blame] | 181 | .ops = &stm32_serial_ops, |
| 182 | .probe = stm32_serial_probe, |
| 183 | .flags = DM_FLAG_PRE_RELOC, |
| 184 | }; |
Patrick Delaunay | ab8e5d2 | 2018-05-17 14:50:42 +0200 | [diff] [blame] | 185 | |
| 186 | #ifdef CONFIG_DEBUG_UART_STM32 |
| 187 | #include <debug_uart.h> |
| 188 | static inline struct stm32_uart_info *_debug_uart_info(void) |
| 189 | { |
| 190 | struct stm32_uart_info *uart_info; |
| 191 | |
| 192 | #if defined(CONFIG_STM32F4) |
| 193 | uart_info = &stm32f4_info; |
| 194 | #elif defined(CONFIG_STM32F7) |
| 195 | uart_info = &stm32f7_info; |
| 196 | #else |
| 197 | uart_info = &stm32h7_info; |
| 198 | #endif |
| 199 | return uart_info; |
| 200 | } |
| 201 | |
| 202 | static inline void _debug_uart_init(void) |
| 203 | { |
| 204 | fdt_addr_t base = CONFIG_DEBUG_UART_BASE; |
| 205 | struct stm32_uart_info *uart_info = _debug_uart_info(); |
| 206 | |
| 207 | _stm32_serial_init(base, uart_info); |
| 208 | _stm32_serial_setbrg(base, uart_info, |
| 209 | CONFIG_DEBUG_UART_CLOCK, |
| 210 | CONFIG_BAUDRATE); |
| 211 | printf("DEBUG done\n"); |
| 212 | } |
| 213 | |
| 214 | static inline void _debug_uart_putc(int c) |
| 215 | { |
| 216 | fdt_addr_t base = CONFIG_DEBUG_UART_BASE; |
| 217 | struct stm32_uart_info *uart_info = _debug_uart_info(); |
| 218 | |
| 219 | while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN) |
| 220 | WATCHDOG_RESET(); |
| 221 | } |
| 222 | |
| 223 | DEBUG_UART_FUNCS |
| 224 | #endif |