Blame - include/fsl-mc/ldpaa_wriop.h - filogic/uboot

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Tom Rini	10e4779	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	2	/*
				3	* Copyright (C) 2015 Freescale Semiconductor
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	4	*/
				5
				6	#ifndef __LDPAA_WRIOP_H
				7	#define __LDPAA_WRIOP_H
				8
Pankaj Bansal	50adb5e	2018-10-10 14:08:34 +0530	[diff] [blame]	9	#include <phy.h>
				10
				11	#define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0"
				12	#define DEFAULT_WRIOP_MDIO2_NAME "FSL_MDIO1"
				13	#define WRIOP_MAX_PHY_NUM 2
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	14
				15	enum wriop_port {
				16	WRIOP1_DPMAC1 = 1,
				17	WRIOP1_DPMAC2,
				18	WRIOP1_DPMAC3,
				19	WRIOP1_DPMAC4,
				20	WRIOP1_DPMAC5,
				21	WRIOP1_DPMAC6,
				22	WRIOP1_DPMAC7,
				23	WRIOP1_DPMAC8,
				24	WRIOP1_DPMAC9,
				25	WRIOP1_DPMAC10,
				26	WRIOP1_DPMAC11,
				27	WRIOP1_DPMAC12,
				28	WRIOP1_DPMAC13,
				29	WRIOP1_DPMAC14,
				30	WRIOP1_DPMAC15,
				31	WRIOP1_DPMAC16,
				32	WRIOP1_DPMAC17,
				33	WRIOP1_DPMAC18,
				34	WRIOP1_DPMAC19,
				35	WRIOP1_DPMAC20,
				36	WRIOP1_DPMAC21,
				37	WRIOP1_DPMAC22,
				38	WRIOP1_DPMAC23,
				39	WRIOP1_DPMAC24,
				40	NUM_WRIOP_PORTS,
				41	};
				42
				43	struct wriop_dpmac_info {
				44	u8 enabled;
				45	u8 id;
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	46	u8 board_mux;
Pankaj Bansal	50adb5e	2018-10-10 14:08:34 +0530	[diff] [blame]	47	int phy_addr[WRIOP_MAX_PHY_NUM];
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	48	phy_interface_t enet_if;
Pankaj Bansal	50adb5e	2018-10-10 14:08:34 +0530	[diff] [blame]	49	struct phy_device *phydev[WRIOP_MAX_PHY_NUM];
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	50	struct mii_dev *bus;
				51	};
				52
				53	extern struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
				54
Pankaj Bansal	50adb5e	2018-10-10 14:08:34 +0530	[diff] [blame]	55	void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl);
				56	void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if);
				57	int wriop_disable_dpmac(int dpmac_id);
				58	int wriop_enable_dpmac(int dpmac_id);
				59	int wriop_is_enabled_dpmac(int dpmac_id);
				60	int wriop_set_mdio(int dpmac_id, struct mii_dev *bus);
				61	struct mii_dev *wriop_get_mdio(int dpmac_id);
				62	int wriop_set_phy_address(int dpmac_id, int phy_num, int address);
				63	int wriop_get_phy_address(int dpmac_id, int phy_num);
				64	int wriop_set_phy_dev(int dpmac_id, int phy_num, struct phy_device *phydev);
				65	struct phy_device *wriop_get_phy_dev(int dpmac_id, int phy_num);
				66	phy_interface_t wriop_get_enet_if(int dpmac_id);
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	67
Pankaj Bansal	50adb5e	2018-10-10 14:08:34 +0530	[diff] [blame]	68	void wriop_dpmac_disable(int dpmac_id);
				69	void wriop_dpmac_enable(int dpmac_id);
				70	phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl);
				71	void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl);
Ashish Kumar	ec455e2	2017-08-31 16:37:31 +0530	[diff] [blame]	72	void wriop_init_rgmii(void);
Prabhakar Kushwaha	2dd335f	2015-03-20 19:28:22 -0700	[diff] [blame]	73	#endif /* __LDPAA_WRIOP_H */