blob: f91f7cc58760b9c76111df14e3e411104f31a91c [file] [log] [blame]
Peng Fan0c830d32018-10-18 14:28:07 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef _SC_SCI_H
7#define _SC_SCI_H
8
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Peng Fan0c830d32018-10-18 14:28:07 +020010#include <asm/arch/sci/types.h>
11#include <asm/arch/sci/svc/misc/api.h>
12#include <asm/arch/sci/svc/pad/api.h>
13#include <asm/arch/sci/svc/pm/api.h>
14#include <asm/arch/sci/svc/rm/api.h>
Peng Fand4191db2019-09-23 10:12:31 +000015#include <asm/arch/sci/svc/seco/api.h>
Peng Fan0c830d32018-10-18 14:28:07 +020016#include <asm/arch/sci/rpc.h>
17#include <dt-bindings/soc/imx_rsrc.h>
18#include <linux/errno.h>
19
20static inline int sc_err_to_linux(sc_err_t err)
21{
22 int ret;
23
24 switch (err) {
25 case SC_ERR_NONE:
26 return 0;
27 case SC_ERR_VERSION:
28 case SC_ERR_CONFIG:
29 case SC_ERR_PARM:
30 ret = -EINVAL;
31 break;
32 case SC_ERR_NOACCESS:
33 case SC_ERR_LOCKED:
34 case SC_ERR_UNAVAILABLE:
35 ret = -EACCES;
36 break;
37 case SC_ERR_NOTFOUND:
38 case SC_ERR_NOPOWER:
39 ret = -ENODEV;
40 break;
41 case SC_ERR_IPC:
42 ret = -EIO;
43 break;
44 case SC_ERR_BUSY:
45 ret = -EBUSY;
46 break;
47 case SC_ERR_FAIL:
48 ret = -EIO;
49 break;
50 default:
51 ret = 0;
52 break;
53 }
54
55 debug("%s %d %d\n", __func__, err, ret);
56
57 return ret;
58}
59
Peng Fan55486382018-10-18 14:28:12 +020060/* PM API*/
61int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
62 sc_pm_power_mode_t mode);
Peng Fand4191db2019-09-23 10:12:31 +000063int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
64 sc_pm_power_mode_t *mode);
Peng Fan55486382018-10-18 14:28:12 +020065int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
66 sc_pm_clock_rate_t *rate);
67int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
68 sc_pm_clock_rate_t *rate);
Peng Fan55486382018-10-18 14:28:12 +020069int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
70 sc_bool_t enable, sc_bool_t autog);
Peng Fand4191db2019-09-23 10:12:31 +000071int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
72 sc_pm_clk_parent_t parent);
73int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
74 sc_faddr_t address);
75sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
Ye Li24b5dae2019-11-13 21:20:43 -080076int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource);
Peng Fan55486382018-10-18 14:28:12 +020077
78/* MISC API */
Peng Fand4191db2019-09-23 10:12:31 +000079int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
80 sc_ctrl_t ctrl, u32 val);
Peng Fan55486382018-10-18 14:28:12 +020081int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl,
82 u32 *val);
83void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev);
84void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status);
85void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit);
86int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val);
Peng Fanba44e012019-05-05 13:23:51 +000087int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp,
88 s16 *celsius, s8 *tenths);
Peng Fan55486382018-10-18 14:28:12 +020089
90/* RM API */
91sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
Peng Fand4191db2019-09-23 10:12:31 +000092int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start,
93 sc_faddr_t addr_end);
94int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
95 sc_rm_pt_t pt, sc_rm_perm_t perm);
Peng Fan55486382018-10-18 14:28:12 +020096int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
97 sc_faddr_t *addr_end);
98sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
Peng Fand4191db2019-09-23 10:12:31 +000099int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
100 sc_bool_t isolated, sc_bool_t restricted,
101 sc_bool_t grant, sc_bool_t coherent);
102int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt);
103int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
104int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
105int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
106int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad);
107sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad);
108int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource,
109 sc_rm_pt_t *pt);
Peng Fan55486382018-10-18 14:28:12 +0200110
111/* PAD API */
112int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200113int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
Peng Fand4191db2019-09-23 10:12:31 +0000114
115/* SMMU API */
116int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid);
117
118/* SECO API */
119int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd,
120 sc_faddr_t addr);
121int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change);
122int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l,
123 u32 *uid_h);
124void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit);
125int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event);
126int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
127 sc_faddr_t export_addr, u16 max_size);
Breno Lima184c7e22019-10-16 18:10:54 -0300128int sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, u16 dst_size);
129int sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, u8 size, u8 lock);
130int sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
131 u16 msg_size, sc_faddr_t dst_addr, u16 dst_size);
Ye Li24b5dae2019-11-13 21:20:43 -0800132int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data);
Franck LENORMANDd3b70ea2019-10-09 10:27:43 +0200133int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access,
134 u32 *data0, u32 *data1, u32 *data2, u32 *data3,
135 u32 *data4, u8 size);
Peng Fand4191db2019-09-23 10:12:31 +0000136
Peng Fan0c830d32018-10-18 14:28:07 +0200137#endif