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Bryan Brattlofdaa39a62022-11-03 19:13:55 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * AM62A7: SoC specific initialization
4 *
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <spl.h>
9#include <asm/io.h>
10#include <asm/arch/hardware.h>
11#include <asm/arch/sysfw-loader.h>
12#include "common.h"
13#include <dm.h>
14#include <dm/uclass-internal.h>
15#include <dm/pinctrl.h>
16
17/*
18 * This uninitialized global variable would normal end up in the .bss section,
19 * but the .bss is cleared between writing and reading this variable, so move
20 * it to the .data section.
21 */
22u32 bootindex __section(".data");
23static struct rom_extended_boot_data bootdata __section(".data");
24
25static void store_boot_info_from_rom(void)
26{
27 bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
28 memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
29 sizeof(struct rom_extended_boot_data));
30}
31
32static void ctrl_mmr_unlock(void)
33{
34 /* Unlock all WKUP_CTRL_MMR0 module registers */
35 mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
36 mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
37 mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
38 mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
39 mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
40 mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
41 mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
42 mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
43
44 /* Unlock all CTRL_MMR0 module registers */
45 mmr_unlock(CTRL_MMR0_BASE, 0);
46 mmr_unlock(CTRL_MMR0_BASE, 1);
47 mmr_unlock(CTRL_MMR0_BASE, 2);
48 mmr_unlock(CTRL_MMR0_BASE, 4);
49 mmr_unlock(CTRL_MMR0_BASE, 5);
50 mmr_unlock(CTRL_MMR0_BASE, 6);
51
52 /* Unlock all MCU_CTRL_MMR0 module registers */
53 mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
54 mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
55 mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
56 mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
57 mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
58 mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
59
60 /* Unlock PADCFG_CTRL_MMR padconf registers */
61 mmr_unlock(PADCFG_MMR0_BASE, 1);
62 mmr_unlock(PADCFG_MMR1_BASE, 1);
63}
64
65void board_init_f(ulong dummy)
66{
67 struct udevice *dev;
68 int ret;
69
70#if defined(CONFIG_CPU_V7R)
71 setup_k3_mpu_regions();
72#endif
73
74 /*
75 * Cannot delay this further as there is a chance that
76 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
77 */
78 store_boot_info_from_rom();
79
80 ctrl_mmr_unlock();
81
82 /* Init DM early */
83 spl_early_init();
84
85 /*
86 * Process pinctrl for the serial0 and serial3, aka WKUP_UART0 and
87 * MAIN_UART1 modules and continue regardless of the result of pinctrl.
88 * Do this without probing the device, but instead by searching the
89 * device that would request the given sequence number if probed. The
90 * UARTs will be used by the DM firmware and TIFS firmware images
91 * respectively and the firmware depend on SPL to initialize the pin
92 * settings.
93 */
94 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 0, &dev);
95 if (!ret)
96 pinctrl_select_state(dev, "default");
97
98 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
99 if (!ret)
100 pinctrl_select_state(dev, "default");
101
102#ifdef CONFIG_K3_EARLY_CONS
103 /*
104 * Allow establishing an early console as required for example when
105 * doing a UART-based boot. Note that this console may not "survive"
106 * through a SYSFW PM-init step and will need a re-init in some way
107 * due to changing module clock frequencies.
108 */
109 early_console_init();
110#endif
111
112#if defined(CONFIG_K3_LOAD_SYSFW)
113 /*
114 * Configure and start up system controller firmware. Provide
115 * the U-Boot console init function to the SYSFW post-PM configuration
116 * callback hook, effectively switching on (or over) the console
117 * output.
118 */
119 ret = is_rom_loaded_sysfw(&bootdata);
120 if (!ret)
121 panic("ROM has not loaded TIFS firmware\n");
122
123 k3_sysfw_loader(true, NULL, NULL);
124#endif
125
126 /*
127 * Force probe of clk_k3 driver here to ensure basic default clock
128 * configuration is always done.
129 */
130 if (IS_ENABLED(CONFIG_SPL_CLK_K3)) {
131 ret = uclass_get_device_by_driver(UCLASS_CLK,
132 DM_DRIVER_GET(ti_clk),
133 &dev);
134 if (ret)
135 printf("Failed to initialize clk-k3!\n");
136 }
137
138 preloader_console_init();
139
140 /* Output System Firmware version info */
141 k3_sysfw_print_ver();
142
143#if defined(CONFIG_K3_AM62A_DDRSS)
144 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
145 if (ret)
146 panic("DRAM init failed: %d\n", ret);
147#endif
148
149 printf("am62a_init: %s done\n", __func__);
150}
151
152static u32 __get_backup_bootmedia(u32 devstat)
153{
154 u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
155 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
156 u32 bkup_bootmode_cfg =
157 (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
158 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
159
160 switch (bkup_bootmode) {
161 case BACKUP_BOOT_DEVICE_UART:
162 return BOOT_DEVICE_UART;
163
164 case BACKUP_BOOT_DEVICE_USB:
165 return BOOT_DEVICE_USB;
166
167 case BACKUP_BOOT_DEVICE_ETHERNET:
168 return BOOT_DEVICE_ETHERNET;
169
170 case BACKUP_BOOT_DEVICE_MMC:
171 if (bkup_bootmode_cfg)
172 return BOOT_DEVICE_MMC2;
173 return BOOT_DEVICE_MMC1;
174
175 case BACKUP_BOOT_DEVICE_SPI:
176 return BOOT_DEVICE_SPI;
177
178 case BACKUP_BOOT_DEVICE_I2C:
179 return BOOT_DEVICE_I2C;
180
181 case BACKUP_BOOT_DEVICE_DFU:
182 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
183 return BOOT_DEVICE_USB;
184 return BOOT_DEVICE_DFU;
185 };
186
187 return BOOT_DEVICE_RAM;
188}
189
190static u32 __get_primary_bootmedia(u32 devstat)
191{
192 u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
193 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
194 u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
195 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
196
197 switch (bootmode) {
198 case BOOT_DEVICE_OSPI:
199 fallthrough;
200 case BOOT_DEVICE_QSPI:
201 fallthrough;
202 case BOOT_DEVICE_XSPI:
203 fallthrough;
204 case BOOT_DEVICE_SPI:
205 return BOOT_DEVICE_SPI;
206
207 case BOOT_DEVICE_ETHERNET_RGMII:
208 fallthrough;
209 case BOOT_DEVICE_ETHERNET_RMII:
210 return BOOT_DEVICE_ETHERNET;
211
212 case BOOT_DEVICE_EMMC:
213 return BOOT_DEVICE_MMC1;
214
215 case BOOT_DEVICE_SPI_NAND:
216 return BOOT_DEVICE_SPINAND;
217
218 case BOOT_DEVICE_MMC:
219 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
220 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
221 return BOOT_DEVICE_MMC2;
222 return BOOT_DEVICE_MMC1;
223
224 case BOOT_DEVICE_DFU:
225 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
226 MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
227 return BOOT_DEVICE_USB;
228 return BOOT_DEVICE_DFU;
229
230 case BOOT_DEVICE_NOBOOT:
231 return BOOT_DEVICE_RAM;
232 }
233
234 return bootmode;
235}
236
237u32 spl_boot_device(void)
238{
239 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
240 u32 bootmedia;
241
242 if (bootindex == K3_PRIMARY_BOOTMODE)
243 bootmedia = __get_primary_bootmedia(devstat);
244 else
245 bootmedia = __get_backup_bootmedia(devstat);
246
247 printf("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
248 __func__, devstat, bootmedia, bootindex);
249 return bootmedia;
250}